Hi Uros, Thank you for the review comments.
Committed to trunk at http://gcc.gnu.org/viewcvs?view=revision&revision=191245 Regards, Venkat. -----Original Message----- From: Uros Bizjak [mailto:ubiz...@gmail.com] Sent: Wednesday, September 12, 2012 9:14 PM To: Kumar, Venkataramanan Cc: gcc-patches@gcc.gnu.org Subject: Re: [PATCH,i386] Enable prefetchw in processor alias table for AMD targets On Tue, Sep 11, 2012 at 11:03 AM, <venkataramanan.ku...@amd.com> wrote: > Hi Maintainers, > > This patch enables "prefetchw" ISA in the processor alias table for targets > amdfam10,barcelona and bdver1,2 and btver1,2. > > GCC regression test passes with the patch. > > Ok for trunk? > > Change log: > > 2012-09-11 Venkataramanan Kumar <venkataramanan.ku...@amd.com> > > * config/i386/i386.c (processor_alias_table): Enable PTA_PRFCHW > for targets amdfam10, barcelona, bdver1, bdver2, btver1 and btver2. Please note that amdfam10 and barcelona are already generating prefetchw due to PTA_3DNOW flag, so these targets can be removed from the patch. The patch is OK for mainline with that change. Please commit the patch. Thanks, Uros.
