> -----Original Message-----
> From: Jakub Jelinek <[email protected]>
> Sent: Wednesday, March 4, 2026 4:19 PM
> To: Uros Bizjak <[email protected]>; Liu, Hongtao <[email protected]>
> Cc: [email protected]
> Subject: [PATCH] i386: Fix up vcvt<convertfp8_pack><mode><mask_name>
> for -masm=intel [PR124341]
>
> Hi!
>
> The vcvt<convertfp8_pack><mode><mask_name> pattern uses wrong
> <mask_operand?> for -masm=intel, so the testcase fails to assemble, it emits
> something like {ymm1} instead of {k1}.
>
> Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?
Ok.
>
> 2026-03-04 Jakub Jelinek <[email protected]>
>
> PR target/124341
> * config/i386/sse.md
> (vcvt<convertfp8_pack><mode><mask_name>): Use
> <mask_operand3> rather than <mask_operand2> for -masm=intel.
>
> * gcc.target/i386/avx10_2-pr124341.c: New test.
>
> --- gcc/config/i386/sse.md.jj 2026-03-03 09:51:27.312793387 +0100
> +++ gcc/config/i386/sse.md 2026-03-03 11:03:25.874464464 +0100
> @@ -32444,7 +32444,7 @@ (define_insn "vcvt<convertfp8_pack><mode
> (match_operand:VHF_AVX512VL 2 "nonimmediate_operand"
> "vm")]
> UNSPEC_CONVERTFP8_PACK))]
> "TARGET_AVX10_2"
> -
> "vcvt<convertfp8_pack>\t{%2, %1, %0<mask_operand3>|%0<mask_operand
> 2>, %1, %2}"
> +
> "vcvt<convertfp8_pack>\t{%2, %1, %0<mask_operand3>|%0<mask_operand
> 3>, %1, %2}"
> [(set_attr "prefix" "evex")])
>
> (define_mode_attr ssebvecmode_2
> --- gcc/testsuite/gcc.target/i386/avx10_2-pr124341.c.jj 2026-03-03
> 11:16:34.644251662 +0100
> +++ gcc/testsuite/gcc.target/i386/avx10_2-pr124341.c 2026-03-03
> 11:16:06.238727488 +0100
> @@ -0,0 +1,77 @@
> +/* PR target/124341 */
> +/* { dg-do assemble { target { avx10_2 && masm_intel } } } */
> +/* { dg-options "-O2 -mavx10.2 -masm=intel" } */
> +
> +#include <x86intrin.h>
> +
> +__m128i
> +mm_mask_cvt2ph_bf8 (__m128i w, __mmask16 u, __m128h a, __m128h b)
> {
> + return _mm_mask_cvt2ph_bf8 (w, u, a, b); }
> +
> +__m256i
> +mm256_mask_cvt2ph_bf8 (__m256i w, __mmask32 u, __m256h a,
> __m256h b) {
> + return _mm256_mask_cvt2ph_bf8 (w, u, a, b); }
> +
> +__m512i
> +mm512_mask_cvt2ph_bf8 (__m512i w, __mmask64 u, __m512h a,
> __m512h b) {
> + return _mm512_mask_cvt2ph_bf8 (w, u, a, b); }
> +
> +__m128i
> +mm_mask_cvts_2ph_bf8 (__m128i w, __mmask16 u, __m128h a, __m128h
> b) {
> + return _mm_mask_cvts_2ph_bf8 (w, u, a, b); }
> +
> +__m256i
> +mm256_mask_cvts_2ph_bf8 (__m256i w, __mmask32 u, __m256h a,
> __m256h b)
> +{
> + return _mm256_mask_cvts_2ph_bf8 (w, u, a, b); }
> +
> +__m512i
> +mm512_mask_cvts_2ph_bf8 (__m512i w, __mmask64 u, __m512h a,
> __m512h b)
> +{
> + return _mm512_mask_cvts_2ph_bf8 (w, u, a, b); }
> +
> +__m128i
> +mm_mask_cvt2ph_hf8 (__m128i w, __mmask16 u, __m128h a, __m128h b)
> {
> + return _mm_mask_cvt2ph_hf8 (w, u, a, b); }
> +
> +__m256i
> +mm256_mask_cvt2ph_hf8 (__m256i w, __mmask32 u, __m256h a,
> __m256h b) {
> + return _mm256_mask_cvt2ph_hf8 (w, u, a, b); }
> +
> +__m512i
> +mm512_mask_cvt2ph_hf8 (__m512i w, __mmask64 u, __m512h a,
> __m512h b) {
> + return _mm512_mask_cvt2ph_hf8 (w, u, a, b); }
> +
> +__m128i
> +mm_mask_cvts_2ph_hf8 (__m128i w, __mmask16 u, __m128h a, __m128h
> b) {
> + return _mm_mask_cvts_2ph_hf8 (w, u, a, b); }
> +
> +__m256i
> +mm256_mask_cvts_2ph_hf8 (__m256i w, __mmask32 u, __m256h a,
> __m256h b)
> +{
> + return _mm256_mask_cvts_2ph_hf8 (w, u, a, b); }
> +
> +__m512i
> +mm512_mask_cvts_2ph_hf8 (__m512i w, __mmask64 u, __m512h a,
> __m512h b)
> +{
> + return _mm512_mask_cvts_2ph_hf8 (w, u, a, b); }
>
> Jakub
