On 7/16/2026 6:44 AM, Jin Ma wrote: > RISCV_CALL_ADDRESS_TEMP and RISCV_PROLOGUE_TEMP2 both use t1. An > indirect sibcall target in t1 can therefore be overwritten by an RVV > scalable-frame epilogue before the final jump. > > Exclude t1 from SIBCALL_REGS and map it to JALR_REGS. > > gcc/ChangeLog: > > * config/riscv/riscv.cc (riscv_regno_to_class): Map t1 to > JALR_REGS. > * config/riscv/riscv.h (RISCV_PROLOGUE_TEMP_REGNUM): Document > the SIBCALL_REGS restriction. > (REG_CLASS_CONTENTS): Remove t1 from SIBCALL_REGS. > > gcc/testsuite/ChangeLog: > > * g++.target/riscv/pr97682.C: Accept registers in SIBCALL_REGS. > * gcc.target/riscv/rvv/base/sibcall-scalable-frame-indirect.c: > New test. > * gcc.target/riscv/rvv/base/sibcall-scalable-frame-weak.c: New test. Note the RISE pre-commit tester seems to not be picking up jobs again for reasons unknown. So I wouldn't wait for it. Instead we'll have to rely on my system as a post-commit test.
Anyway, this is fine for the trunk. Thanks, Jeff
