On Wed, 17 Oct 2012, Jason Merrill wrote:
On 10/17/2012 10:30 PM, Marc Glisse wrote:
For each component of a vector type,
result[i] = if MSB of c[i] is set ? b[i] : a[i].
Curious. Do you know why they produce and expect -1 for true? It certainly
seems to be a deliberate design choice, so I wonder what motivated it.
(just guessing)
First a look at hardware. Vector units in x86, power and arm all produce
-1 from comparisons. For selection, arm expects a vector of 0 and -1,
power looks at x!=0, and x86 at x<0 (so opencl matches x86). A vector of
-1 can be convenient on platforms without a selection instruction so it
can be implemented with and+not+or. Looking at the MSB has the advantage
(compared to !=0) that using & and | has the expected result.
In the middle-end, VEC_COND_EXPR is documented to take a vector of 0 and
-1, and at expansion time, it gives vcond(x<0,y,z) to the target if its
first argument is not a comparison.
I think people will expect a >0 value to be considered true, so I am inclined
to deviate in this case.
Clang's webpage says they support ?: for vector types, but my version
(3.1) rejects it, I'll compile a new one to check what they do.
--
Marc Glisse
