Hi,
Attached is a patch that makes the test case for <su>mull<q> more robust by
looking for {scan-assembler "smull v[0-9]+\.<type>}" where <type> = {8h,
4s, 2d} and "smull2 v[0-9]+\.<type>}" where <type> = {8h, 4s, 2d} instead of
looking for a specific number of occurances of "smull v" which can vary with the
vectorization factor.
Tested on aarch64-4.7-branch and trunk for aarch64-none-elf. OK to commit on
aarch64-4.7-branch and trunk?
Thanks,
Tejas Belagod
ARM.
2013-01-08 Tejas Belagod <tejas.bela...@arm.com>
testsuite/
* gcc.target/aarch64/vect-mull-compile.c: Explicitly scan for
instructions generated instead of number of occurances.diff --git a/gcc/testsuite/gcc.target/aarch64/vect-mull-compile.c
b/gcc/testsuite/gcc.target/aarch64/vect-mull-compile.c
index e51eaee..e90c97f 100644
--- a/gcc/testsuite/gcc.target/aarch64/vect-mull-compile.c
+++ b/gcc/testsuite/gcc.target/aarch64/vect-mull-compile.c
@@ -10,7 +10,15 @@ DEF_MULL2 (DEF_MULLB)
DEF_MULL2 (DEF_MULLH)
DEF_MULL2 (DEF_MULLS)
-/* { dg-final { scan-assembler-times "smull v" 3 } } */
-/* { dg-final { scan-assembler-times "smull2 v" 3 } } */
-/* { dg-final { scan-assembler-times "umull v" 3 } } */
-/* { dg-final { scan-assembler-times "umull2 v" 3 } } */
+/* { dg-final { scan-assembler "smull\\tv\[0-9\]+\.8h"} } */
+/* { dg-final { scan-assembler "smull\\tv\[0-9\]+\.4s"} } */
+/* { dg-final { scan-assembler "smull\\tv\[0-9\]+\.2d"} } */
+/* { dg-final { scan-assembler "umull\\tv\[0-9\]+\.8h"} } */
+/* { dg-final { scan-assembler "umull\\tv\[0-9\]+\.4s"} } */
+/* { dg-final { scan-assembler "umull\\tv\[0-9\]+\.2d"} } */
+/* { dg-final { scan-assembler "smull2\\tv\[0-9\]+\.8h"} } */
+/* { dg-final { scan-assembler "smull2\\tv\[0-9\]+\.4s"} } */
+/* { dg-final { scan-assembler "smull2\\tv\[0-9\]+\.2d"} } */
+/* { dg-final { scan-assembler "umull2\\tv\[0-9\]+\.8h"} } */
+/* { dg-final { scan-assembler "umull2\\tv\[0-9\]+\.4s"} } */
+/* { dg-final { scan-assembler "umull2\\tv\[0-9\]+\.2d"} } */
