> * Uses register bank 3 instead of register bank 0 inside the > handler.
I wonder if nested interrupts will cause problems, since the second interrupt will occur with RB3 already selected. Also, there are some hand-coded routines in libgloss/libgcc that manually swap banks, they'd have to be checked to see if there are issues there. Perhaps the G10 work there solved it already. Those, plus Vinay's patch, should be OK otherwise. My original intention was to leave RB3 unused for *hand coded* assembler, but if we can use it for simpler C handlers too that's all for the better :-) > Tested, with no regressions, on an rl78-elf target. The testsuite doesn't test interrupts... I'm not even sure the simulator can simulate interrupt events.
