On 07/25/2013 05:36 PM, DJ Delorie wrote:
I tried to reproduce the original bugs that led to these patterns, but
was unable. Testsuite results are the same with and without, and
eembc code size doesn't change.
So, I'm removing these patterns from the port.
The remaining (subreg...) patterns are just optimizations.
So it's a little unclear to me which patterns you removed. Your message
has two patterns attached with comments they were to work around reload
issues. Are these the patterns you removed:
; This pattern is identical to the truncsipsi2 pattern except
; that it uses a SUBREG instead of a TRUNC. It is needed in
; order to prevent reload from converting (set:SI (SUBREG:PSI (SI)))
; into (SET:PSI (PSI)).
;
; Note: using POPM.A #1 is two bytes smaller than using POPX.A....
(define_insn "movsipsi2"
[(set (match_operand:PSI 0 "register_operand" "=r")
(subreg:PSI (match_operand:SI 1 "register_operand" "r") 0))]
"TARGET_LARGE"
"PUSH.W %H1 { PUSH.W %1 { POPM.A #1, %0"
)
; This pattern is needed in order to avoid reload problems.
; It takes an SI pair of registers, adds a value to them, and
; then converts them into a single PSI register.
(define_insn "addsipsi3"
[(set (subreg:SI (match_operand:PSI 0 "register_operand" "=&r") 0)
(plus:SI (match_operand:SI 1 "register_operand" "0")
(match_operand 2 "general_operand" "rmi")))
(clobber (reg:CC CARRY))
]
""
"ADD.W\t%L2, %L0 { ADDC.W\t%H2, %H0 { PUSH.W %H0 { PUSH.W %L0 { POPM.A #1,
%0"
)
With respect to optimizations, I was looking over the old mn102 port and
found the following you might want to consider.
First, if you can handle ASHIFT directly in PSImode, that's advantageous
for address calculations. Second, I had a fair number of combiner
patterns to try and combine things enough that we could eliminate
extensions in address arithmetic. Here's the patterns for reference:
;; These are special combiner patterns to improve array/pointer accesses.
;;
;; A typical sequence involves extending an integer/char, shifting it left
;; a few times, then truncating the value to PSImode.
;;
;; This first pattern combines the shifting & truncation operations, by
;; itself it is a win because the shifts end up occurring in PSImode instead
;; of SImode. However, it has the secondary effect of giving us the
;; opportunity to match patterns which allow us to remove the initial
;; extension completely, which is a big win.
(define_insn ""
[(set (match_operand:PSI 0 "general_operand" "=d,d,a")
(truncate:PSI
(ashift:SI (match_operand:SI 1 "general_operand" "d,m,m")
(match_operand:HI 2 "const_int_operand" "i,i,i"))))]
""
"*
{
int count = INTVAL (operands[2]);
if (which_alternative == 0)
output_asm_insn (\"jsr ___truncsipsi2_%1_%0\", operands);
else if (which_alternative == 1)
output_asm_insn (\"movx %A1,%0\", operands);
else
output_asm_insn (\" mov %1,%0\", operands);
while (count)
{
output_asm_insn (\"add %0,%0\", operands);
count--;
}
return \"\";
}"
[(set_attr "cc" "clobber")])
;; Similarly, except that we also have zero/sign extension of the
;; original operand. */
(define_insn ""
[(set (match_operand:PSI 0 "general_operand" "=d,d")
(truncate:PSI
(ashift:SI
(zero_extend:SI (match_operand:HI 1 "general_operand" "0,dim"))
(match_operand:HI 2 "const_int_operand" "i,i"))))]
""
"*
{
int count = INTVAL (operands[2]);
/* First extend operand 1 to PSImode. */
if (which_alternative == 0)
output_asm_insn (\"extxu %0\", operands);
else
output_asm_insn (\"mov %1,%0\;extxu %0\", operands);
/* Now do the shifting. */
while (count)
{
output_asm_insn (\"add %0,%0\", operands);
count--;
}
return \"\";
}"
[(set_attr "cc" "clobber")])
(define_insn ""
[(set (match_operand:PSI 0 "general_operand" "=d,d,d")
(truncate:PSI
(ashift:SI
(sign_extend:SI (match_operand:HI 1 "general_operand" "0,di,m"))
(match_operand:HI 2 "const_int_operand" "i,i,i"))))]
""
"*
{
int count = INTVAL (operands[2]);
/* First extend operand 1 to PSImode. */
if (which_alternative == 0)
output_asm_insn (\"extx %0\", operands);
else if (which_alternative == 1)
output_asm_insn (\"mov %1,%0\;extx %0\", operands);
else
output_asm_insn (\"mov %1,%0\", operands);
/* Now do the shifting. */
while (count)
{
output_asm_insn (\"add %0,%0\", operands);
count--;
}
return \"\";
}"
[(set_attr "cc" "clobber")])
(define_insn ""
[(set (match_operand:PSI 0 "general_operand" "=d,d,d")
(truncate:PSI
(ashift:SI
(sign_extend:SI
(zero_extend:HI (match_operand:QI 1 "general_operand" "0,di,m")))
(match_operand:HI 2 "const_int_operand" "i,i,i"))))]
""
"*
{
int count = INTVAL (operands[2]);
/* First extend operand 1 to PSImode. */
if (which_alternative == 0)
output_asm_insn (\"extxbu %0\", operands);
else if (which_alternative == 1)
output_asm_insn (\"mov %1,%0\;extxbu %0\", operands);
else
output_asm_insn (\"movbu %1,%0\", operands);
/* Now do the shifting. */
while (count)
{
output_asm_insn (\"add %0,%0\", operands);
count--;
}
return \"\";
}"
[(set_attr "cc" "clobber")])
(define_insn ""
[(set (match_operand:PSI 0 "general_operand" "=d,d,d")
(truncate:PSI
(ashift:SI
(sign_extend:SI
(match_operand:QI 1 "general_operand" "0,di,m"))
(match_operand:HI 2 "const_int_operand" "i,i,i"))))]
""
"*
{
int count = INTVAL (operands[2]);
/* First extend operand 1 to PSImode. */
if (which_alternative == 0)
output_asm_insn (\"extxb %0\", operands);
else if (which_alternative == 1)
output_asm_insn (\"mov %1,%0\;extxb %0\", operands);
else if (GET_CODE (XEXP (operands[1], 0)) == REG)
output_asm_insn (\"movbu %1,%0\;extxb %0\", operands);
else
output_asm_insn (\"movb %1,%0\", operands);
/* Now do the shifting. */
while (count)
{
output_asm_insn (\"add %0,%0\", operands);
count--;
}
return \"\";
}"
[(set_attr "cc" "clobber")])
