Hello, in the discussion about the PR middle-end/57748 it became obvious that the ARM target architecture should define a value for MALLOC_ABI_ALIGNMENT, because otherwise the default is simply word aligned, which causes sub-optimal code, at least for the neon fpu.
This simple patch fixes PR target/58065 by defining the MALLOC_ABI_ALIGNMENT as BIGGEST_ALIGNMNET. As a proof that this has indeed some subtle influence on the generated code I created a new test case: The function foo is called by bar, and bar uses malloc to allocate the memory, with compiler options "-O3 -g0 -mfpu=neon -mfloat-abi=softfp" the function foo is inlined into bar, but the inlined version does not use vstr instructions any more, because the front-end does assume that malloc returns 4 byte aligned memory. Regards Bernd Edlinger
2013-08-07 Bernd Edlinger <bernd.edlin...@hotmail.de>
PR target/58065
Set MALLOC_ABI_ALIGNMENT to BIGGEST_ALIGNMENT for ARM.
* gcc/config/arm/arm.h: Define MALLOC_ABI_ALIGNMENT.
* gcc/testsuite/gcc.target/arm/pr58065.c: New testcase.
patch-arm-malloc-abi.diff
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