> So can we assert that we have a REG here and use GET_MODE (XEXP (x, 0))? Or
> else return false if we don't have a REG.
I'm currently testing the patch with the modification below
+static bool
+lsb_bitfield_op_p (rtx x)
+{
+ if (GET_RTX_CLASS (GET_CODE (x)) == RTX_BITFIELD_OPS)
+ {
+ enum machine_mode mode = GET_MODE(XEXP (x, 0));
+ unsigned HOST_WIDE_INT len = INTVAL (XEXP (x, 1));
+ HOST_WIDE_INT pos = INTVAL (XEXP (x, 2));
+
+ return (pos == (BITS_BIG_ENDIAN ? GET_MODE_PRECISION (mode) - len : 0));
+ }
+ return false;
+}
>> According to gcc internals, ROTATE and ROTATERT are similar to the
>> shifting operations, but to be more accurate maybe we can rename
>> shif_code_p in shift_and _rotate_code_p rotation are used in arm
>> address calculation, and thus need to be handle in must_be_index_p
>> and set_address_index
>
> Egad. I guess I just wanted to see it written down. :-)
Sorry, I'm not sure I understand well, it means that you prefer the
shift_and _rotate_code_p notation, right ?
> Btw, are you sure that you don't need to modify must_be_index_p instead?
>
> /* Return true if X must be an index rather than a base. */
>
> static bool
> must_be_index_p (rtx x)
> {
> return GET_CODE (x) == MULT || GET_CODE (x) == ASHIFT;
> }
>
> and call it from set_address_index?
Yes, if we don't modify must_be_index_p we'll have failures when
enabling LRA on ARM. You can find an history if the patch in the
thread named "RFC: patch to build GCC for arm with LRA" which started
more or less here :
http://gcc.gnu.org/ml/gcc-patches/2013-09/msg00526.html
Thanks,
Yvan
> --
> Eric Botcazou
