On Tue, Oct 1, 2013 at 9:41 AM, Ilya Enkovich <enkovich....@gmail.com> wrote:

>> >> >> The x86 part looks mostly OK (I have a couple of comments bellow), but
>> >> >> please first get target-independent changes reviewed and committed.
>> >> >
>> >> > Do you mean I should move bound type and mode declaration into a 
>> >> > separate patch?
>> >>
>> >> Yes, target-independent part (middle end) has to go through the
>> >> separate review to check if this part is OK. The target-dependent part
>> >> uses the infrastructure from the middle end, so it can go into the
>> >> code base only after target-independent parts are committed.
>> >
>> > I sent a separate patch for bound type and mode class 
>> > (http://gcc.gnu.org/ml/gcc-patches/2013-09/msg01268.html). Here is target 
>> > part of the patch with fixes you mentioned. Does it look OK?
>> >
>> > Bootstrapped and checked on linux-x86_64. Still shows incorrect length 
>> > attribute computation (described here 
>> > http://gcc.gnu.org/ml/gcc/2013-07/msg00311.html).
>>
>> Please look at the attached patch that solves length computation
>> problem. The patch also implements length calculation in a generic
>> way, as proposed earlier.
>>
>> The idea is to calculate total insn length via generic "length"
>> attribute calculation from "length_nobnd" attribute, but iff
>> length_attribute is non-null. This way, we are able to decorate
>> bnd-prefixed instructions by "lenght_nobnd" attribute, and generic
>> part will automatically call ix86_bnd_prefixed_insn_p predicate with
>> current insn pattern. I also belive that this approach is most
>> flexible to decorate future patterns.
>>
>> The patch adds new attribute to a couple of patterns to illustrate its usage.
>>
>> Please test this approach. Modulo length calculations, improved by the
>> patch in this message, I have no further comments, but please repost
>> complete (target part) of your patch.
>
> Hi Uros,
>
> Thanks for your reply! I applied approach you proposed for length attribute. 
> It works well. Make check is clean now.
>
> I also adjusted bound registers to recently added mask registers. Attached is 
> a new patch.
>
> Thanks,
> Ilya
>
> --
>
> 2013-09-30  Ilya Enkovich  <ilya.enkov...@intel.com>
>
>         * config/i386/constraints.md (B): New.
>         (Ti): New.
>         (Tb): New.
>         * config/i386/i386-c.c (ix86_target_macros_internal): Add __MPX__.
>         * config/i386/i386-modes.def (BND32): New.
>         (BND64): New.
>         * config/i386/i386-protos.h (ix86_bnd_prefixed_insn_p): New.
>         * config/i386/i386.c (isa_opts): Add mmpx.
>         (regclass_map): Add bound registers.
>         (dbx_register_map): Likewise.
>         (dbx64_register_map): Likewise.
>         (svr4_dbx_register_map): Likewise.
>         (PTA_MPX): New.
>         (ix86_option_override_internal): Support MPX ISA.
>         (ix86_conditional_register_usage): Support bound registers.
>         (print_reg): Likewise.
>         (ix86_code_end): Add MPX bnd prefix.
>         (output_set_got): Likewise.
>         (ix86_output_call_insn): Likewise.
>         (ix86_print_operand): Add '!' (MPX bnd) print prefix support.
>         (ix86_print_operand_punct_valid_p): Likewise.
>         (ix86_print_operand_address): Support UNSPEC_BNDMK_ADDR and
>         UNSPEC_BNDMK_ADDR.
>         (ix86_class_likely_spilled_p): Add bound regs support.
>         (ix86_hard_regno_mode_ok): Likewise.
>         (x86_order_regs_for_local_alloc): Likewise.
>         (ix86_bnd_prefixed_insn_p): New.
>         * config/i386/i386.h (FIRST_PSEUDO_REGISTER): Fix to new value.
>         (FIXED_REGISTERS): Add bound registers.
>         (CALL_USED_REGISTERS): Likewise.
>         (REG_ALLOC_ORDER): Likewise.
>         (HARD_REGNO_NREGS): Likewise.
>         (TARGET_MPX): New.
>         (VALID_BND_REG_MODE): New.
>         (FIRST_BND_REG): New.
>         (LAST_BND_REG): New.
>         (reg_class): Add BND_REGS.
>         (REG_CLASS_NAMES): Likewise.
>         (REG_CLASS_CONTENTS): Likewise.
>         (BND_REGNO_P): New.
>         (ANY_BND_REG_P): New.
>         (BNDmode): New.
>         (HI_REGISTER_NAMES): Add bound registers.
>         * config/i386/i386.md (UNSPEC_BNDMK): New.
>         (UNSPEC_BNDMK_ADDR): New.
>         (UNSPEC_BNDSTX): New.
>         (UNSPEC_BNDLDX): New.
>         (UNSPEC_BNDLDX_ADDR): New.
>         (UNSPEC_BNDCL): New.
>         (UNSPEC_BNDCU): New.
>         (UNSPEC_BNDCN): New.
>         (UNSPEC_MPX_FENCE): New.
>         (BND0_REG): New.
>         (BND1_REG): New.
>         (type): Add mpxmov, mpxmk, mpxchk, mpxld, mpxst.
>         (length_immediate): Likewise.
>         (prefix_0f): Likewise.
>         (memory): Likewise.
>         (prefix_rep): Check for bnd prefix.
>         (length_nobnd): New.
>         (length): Use length_nobnd if specified.
>         (BND): New.
>         (bnd_ptr): New.
>         (BNDCHECK): New.
>         (bndcheck): New.
>         (*jcc_1): Add bnd prefix and rename length attr to length_nobnd.
>         (*jcc_2): Likewise.
>         (jump): Likewise.
>         (simple_return_internal): Likewise.
>         (simple_return_pop_internal): Likewise.
>         (*indirect_jump): Add MPX bnd prefix.
>         (*tablejump_1): Likewise.
>         (simple_return_internal_long): Likewise.
>         (simple_return_indirect_internal): Likewise.
>         (<mode>_mk): New.
>         (*<mode>_mk): New.
>         (mov<mode>): New.
>         (*mov<mode>_internal_mpx): New.
>         (<mode>_<bndcheck>): New.
>         (*<mode>_<bndcheck>): New.
>         (<mode>_ldx): New.
>         (*<mode>_ldx): New.
>         (<mode>_stx): New.
>         (*<mode>_stx): New.
>         * config/i386/predicates.md (lea_address_operand): Rename to...
>         (address_no_seg_operand): ... this.
>         (address_mpx_no_base_operand): New.
>         (address_mpx_no_index_operand): New.
>         (bnd_mem_operator): New.
>         * config/i386/i386.opt (mmpx): New.
>         * doc/invoke.texi: Add documentation for the flags -mmpx, -mno-mpx.
>         * doc/rtl.texi Add documentation for BND32mode and BND64mode.

This is OK for mainline, on the condition that target independent part
is approved and committed first.

Thanks,
Uros.

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