Hi all,
There's a slight error in the Cortex A9 costs I committed recently. The extend
and extend_add costs refer to 32x32->64 bit operations and thus have valid costs
in aarch32. This patches updates those costs for the Cortex A9. The other
existing cost tables are correct in this regard and don't need updating. This is
just a thinko in the A9 costs.
Tested arm-none-eabi on qemu.
Ok for trunk?
Thanks,
Kyrill
[gcc/]
2013-10-21 Kyrylo Tkachov <kyrylo.tkac...@arm.com>
* config/arm/arm.c (cortexa9_extra_costs): Update mult costs for
extend and extend_add.diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index e2baa9b..f85aa5f 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -1078,18 +1078,18 @@ const struct cpu_cost_table cortexa9_extra_costs =
{
COSTS_N_INSNS (3), /* Simple. */
COSTS_N_INSNS (3), /* Flag_setting. */
- COSTS_N_INSNS (4), /* Extend. */
+ COSTS_N_INSNS (2), /* Extend. */
COSTS_N_INSNS (3), /* Add. */
- COSTS_N_INSNS (4), /* Extend_add. */
+ COSTS_N_INSNS (2), /* Extend_add. */
COSTS_N_INSNS (30) /* Idiv. No HW div on Cortex A9. */
},
/* MULT DImode */
{
0, /* Simple (N/A). */
0, /* Flag_setting (N/A). */
- 0, /* Extend (N/A). */
+ COSTS_N_INSNS (4), /* Extend. */
0, /* Add (N/A). */
- 0, /* Extend_add (N/A). */
+ COSTS_N_INSNS (4), /* Extend_add. */
0 /* Idiv (N/A). */
}
},
