Wei Mi <w...@google.com> wrote: >On Thu, Nov 21, 2013 at 11:36 AM, Richard Biener ><richard.guent...@gmail.com> wrote: >> Wei Mi <w...@google.com> wrote: >>>> So what you are doing is basically not only rewriting memory >>>references >>>> to possibly use TARGET_MEM_REF but also address uses to use >>>> &TARGET_MEM_REF. I think this is a good thing in general >>>> (given instructions like x86 lea) and I would not bother >>>distinguishing >>>> the different kind of uses. >>>> >>>> Richard. >>>> >>> >>>You mean to change normal expr to &TMR(expr) form in order to utilize >>>x86 lea type instructions as much as possible. It is interesting. I >>>can experiment that idea later. I am not sure if it could simply >work. >>>My concern is x86 lea still has some limitation (such as three >>>operands lea will have longer latency and can only be issued to >>>port1), if we change some expr to &TMR(expr), will it inhitbit cse >>>opportunity if codegen find out it is not good to use lea? >> >> That needs to be determined. Over all it might be because ivopts >runs so early. At rtl level there should not be big differences apart >from better initial address computations. >> >> Did I misunderstand what your patch does? >> >> Richard. >> > >My patch wants to address the issue that iv uses using as memory >reference actuals for load/store/prefetch builtins are treated as >non-linear iv uses instead of address iv uses, and the result of >determine_use_iv_cost is wrong. After we change those uses to address >uses, less ivs may be used, TMR will be generated for those iv uses >and efficent addressing mode could be utilized.
But are not all pointer typed uses address uses?! Richard. >Thanks, >Wei.
