Thanks for the comments! Here is a second go-round at the patch with improved documentation. I'm happy to change the wording if it can be further improved.
Thanks, Bill 2014-01-09 Bill Schmidt <wschm...@linux.vnet.ibm.com> * doc/invoke.texi: Add -maltivec={be,le} options, and document default element-order behavior for -maltivec. * config/rs6000/rs6000.opt: Add -maltivec={be,le} options. * config/rs6000/rs6000.c (rs6000_option_override_internal): Ensure that -maltivec={le,be} implies -maltivec; disallow -maltivec=le when targeting big endian, at least for now. * config/rs6000/rs6000.h: Add #define of VECTOR_ELT_ORDER_BIG. Index: gcc/doc/invoke.texi =================================================================== --- gcc/doc/invoke.texi (revision 206442) +++ gcc/doc/invoke.texi (working copy) @@ -18855,6 +18855,37 @@ the AltiVec instruction set. You may also need to @option{-mabi=altivec} to adjust the current ABI with AltiVec ABI enhancements. +When -maltivec is used, rather than -maltivec=le or -maltivec=be, the +element order for Altivec intrinsics such as vec_splat, vec_extract, +and vec_insert will match array element order corresponding to the +endianness of the target. That is, element zero identifies the +leftmost element in a vector register when targeting a big-endian +platform, and identifies the rightmost element in a vector register +when targeting a little-endian platform. + +@item -maltivec=be +@opindex maltivec=be +Generate Altivec instructions using big-endian element order, +regardless of whether the target is big- or little-endian. This is +the default when targeting a big-endian platform. + +The element order is used to interpret element numbers in Altivec +intrinsics such as vec_splat, vec_extract, and vec_insert. By +default, these will match array element order corresponding to the +endianness for the target. + +@item -maltivec=le +@opindex maltivec=le +Generate Altivec instructions using little-endian element order, +regardless of whether the target is big- or little-endian. This is +the default when targeting a little-endian platform. This option is +currently ignored when targeting a big-endian platform. + +The element order is used to interpret element numbers in Altivec +intrinsics such as vec_splat, vec_extract, and vec_insert. By +default, these will match array element order corresponding to the +endianness for the target. + @item -mvrsave @itemx -mno-vrsave @opindex mvrsave Index: gcc/config/rs6000/rs6000.opt =================================================================== --- gcc/config/rs6000/rs6000.opt (revision 206442) +++ gcc/config/rs6000/rs6000.opt (working copy) @@ -140,6 +140,14 @@ maltivec Target Report Mask(ALTIVEC) Var(rs6000_isa_flags) Use AltiVec instructions +maltivec=le +Target Report RejectNegative Var(rs6000_altivec_element_order, 1) Save +Generate Altivec instructions using little-endian element order + +maltivec=be +Target Report RejectNegative Var(rs6000_altivec_element_order, 2) +Generate Altivec instructions using big-endian element order + mhard-dfp Target Report Mask(DFP) Var(rs6000_isa_flags) Use decimal floating point instructions Index: gcc/config/rs6000/rs6000.c =================================================================== --- gcc/config/rs6000/rs6000.c (revision 206442) +++ gcc/config/rs6000/rs6000.c (working copy) @@ -3238,6 +3238,18 @@ rs6000_option_override_internal (bool global_init_ && !(processor_target_table[tune_index].target_enable & OPTION_MASK_HTM)) rs6000_isa_flags |= ~rs6000_isa_flags_explicit & OPTION_MASK_STRICT_ALIGN; + /* -maltivec={le,be} implies -maltivec. */ + if (rs6000_altivec_element_order != 0) + rs6000_isa_flags |= OPTION_MASK_ALTIVEC; + + /* Disallow -maltivec=le in big endian mode for now. This is not + known to be useful for anyone. */ + if (BYTES_BIG_ENDIAN && rs6000_altivec_element_order == 1) + { + warning (0, N_("-maltivec=le not allowed for big-endian targets")); + rs6000_altivec_element_order = 0; + } + /* Add some warnings for VSX. */ if (TARGET_VSX) { Index: gcc/config/rs6000/rs6000.h =================================================================== --- gcc/config/rs6000/rs6000.h (revision 206442) +++ gcc/config/rs6000/rs6000.h (working copy) @@ -468,6 +468,15 @@ extern int rs6000_vector_align[]; ? rs6000_vector_align[(MODE)] \ : (int)GET_MODE_BITSIZE ((MODE))) +/* Determine the element order to use for vector instructions. By + default we use big-endian element order when targeting big-endian, + and little-endian element order when targeting little-endian. For + programs being ported from BE Power to LE Power, it can sometimes + be useful to use big-endian element order when targeting little-endian. + This is set via -maltivec=be, for example. */ +#define VECTOR_ELT_ORDER_BIG \ + (BYTES_BIG_ENDIAN || (rs6000_altivec_element_order == 2)) + /* Alignment options for fields in structures for sub-targets following AIX-like ABI. ALIGN_POWER word-aligns FP doubles (default AIX ABI). On Wed, 2014-01-08 at 16:46 -0500, David Edelsohn wrote: > On Tue, Jan 7, 2014 at 6:59 PM, Bill Schmidt > <wschm...@linux.vnet.ibm.com> wrote: > > On Tue, 2014-01-07 at 22:18 +0000, Joseph S. Myers wrote: > >> On Tue, 7 Jan 2014, Bill Schmidt wrote: > >> > >> > Yes, sorry for not being more clear. This is indeed for interpretation > >> > of element numbers in Altivec intrinsics such as vec_splat, vec_extract, > >> > vec_insert, and so forth. By default these will match array element > >> > order for the target endianness. But with -maltivec=be for a little > >> > endian target, we will force use of big-endian element order (matching > >> > the behavior of the underlying hardware instructions). > >> > >> Thanks for the explanation. I think you should make the .texi > >> documentation say something more like this. > >> > > > > Sure, I can wordsmith something along those lines. Thanks for the > > feedback! > > This patch is okay with the documentation clarification requested by Joseph. > > I also would suggest removing "but may be enabled in the future" from > the "le" option and limit the comment to ignored on big-endian > targets. > > Also, please add a comment to -maltivec that it defaults to the native > endian order. And for -maltivec=be, please state that this is the > default for big-endian; for -maltivec=le, please state that this is > the default for little-endian. It's important to be clear and > redundant in this type of documentation. > > Thanks, David >