[PATCH, rs6000] Provide little-endian support for vmrgew and vmrgow

[Bill Schmidt]

Hi,

With -mcpu=power8, we see two test cases (gcc.dg/vect/slp-perm-2.c and
gcc.dg/vect/slp-perm-5.c) regress for powerpc64le-linux.  GCC makes use
of some new Power8 instructions (vmrgew and vmrgow) which need
adjustment for little endian targets.  As with merge-high and merge-low,
we need to reverse the order of the input vectors and reverse the use of
the "odd" and "even" instructions (since the change in element ordering
changes which elements are odd and which are even).

Bootstrapped and tested on powerpc64{,le}-unknown-linux-gnu with no
regressions.  The failing tests now run to completion.  Is this ok for
trunk?

Thanks,
Bill


2014-02-16  Bill Schmidt  <wschm...@linux.vnet.ibm.com>

        * config/rs6000/altivec.md (p8_vmrgew): Handle little endian
        targets.
        (p8_vmrgow): Likewise.



Index: gcc/config/rs6000/altivec.md
===================================================================
--- gcc/config/rs6000/altivec.md        (revision 207809)
+++ gcc/config/rs6000/altivec.md        (working copy)
@@ -1234,7 +1234,12 @@
          (parallel [(const_int 0) (const_int 4)
                     (const_int 2) (const_int 6)])))]
   "TARGET_P8_VECTOR"
-  "vmrgew %0,%1,%2"
+{
+  if (BYTES_BIG_ENDIAN)
+    return "vmrgew %0,%1,%2";
+  else
+    return "vmrgow %0,%2,%1";
+}
   [(set_attr "type" "vecperm")])
 
 (define_insn "p8_vmrgow"
@@ -1246,7 +1251,12 @@
          (parallel [(const_int 1) (const_int 5)
                     (const_int 3) (const_int 7)])))]
   "TARGET_P8_VECTOR"
-  "vmrgow %0,%1,%2"
+{
+  if (BYTES_BIG_ENDIAN)
+    return "vmrgow %0,%1,%2";
+  else
+    return "vmrgew %0,%2,%1";
+}
   [(set_attr "type" "vecperm")])
 
 (define_expand "vec_widen_umult_even_v16qi"