On 18/02/14 21:09, Philipp Tomsich wrote: > The following patch-set contains the pipeline-independent changes to gcc > to support the APM XGene-1 and contains various enhancements derived from > real-world applications and benchmarks running on XGene-1. > > As the pipeline model has not been fully adapted to the new instruction > typing shared between the ARM backend and the AArch64 backend, it is not > yet contained in these patches. > > The most controversial part of these patches will likely consist in the > new cost-model, which has intentionally been provided as a "hook" that > intercepts the current cost-model when compiling for XGene-1. Given that > the matching/structure of this cost-model is different from the existing > implementation, we've chosen to keep this in a separate function for the > time being. >
This patch series is too late for 4.9 and for stage 1 I'd like to see this fixed before the code goes in. Code like this rapidly becomes unmaintainable and makes it difficult to add support for future variants; it tends to proliferate once started and then it becomes necessary to analyse every part of the machine description each time a new device is added to find out whether it needs adjusting. It should be possible to plug the XGene timings into the current infrastructure, though it might be necessary to add some new data values when doing so. The end goal is that nothing in the back-end, apart from instruction scheduling, should be testing for a specific CPU; the backend should make all its code generation decisions from the architecture and tuning tables. R. > > Philipp Tomsich (14): > Use "generic" target, if no other default. > Add "xgene1" core identifier. > Retrieve BRANCH_COST from tuning structure. > Correct the maximum shift amount for shifted operands. > Add AArch64 'prefetch'-pattern. > Extend '*tb<optab><mode>1'. > Define additional patterns for adds/subs. > Define a variant of cmp for the CC_NZ case. > Add special cases of zero-extend w/ compare operations. > Add mov<mode>cc definition for GPF case. > Optimize and(s) patterns for HI/QI operands. > Generate 'bics', when only interested in CC_NZ. > Initial tuning description for XGene-1 core. > Add cost-model for XGene-1. > > gcc/config/aarch64/aarch64-cores.def | 1 + > gcc/config/aarch64/aarch64-protos.h | 2 + > gcc/config/aarch64/aarch64-tune.md | 2 +- > gcc/config/aarch64/aarch64.c | 922 > ++++++++++++++++++++++++++++++++++- > gcc/config/aarch64/aarch64.h | 10 +- > gcc/config/aarch64/aarch64.md | 246 +++++++++- > gcc/config/aarch64/iterators.md | 2 + > gcc/config/arm/types.md | 2 + > 8 files changed, 1172 insertions(+), 15 deletions(-) >
