Hi Denis, > -----Original Message----- > From: Denis Chertykov [mailto:cherty...@gmail.com] > Sent: Monday, March 03, 2014 10:45 PM > 2014-03-03 13:34 GMT+04:00 S, Pitchumani <pitchuman...@atmel.com>: > > Hi, > > > > Few AVR Xmega devices have specific instruction support than the > architecture > > it belongs to. For example atxmega128b1 device has RMW instructions > (XCH,LAC, > > LAS and LAT) support, but not all avrxmega6 devices have. > > > > Now, avr-gcc passes architecture name to assembler instead of device > name. So, > > RMW instructions are not recognized (illegal opcode error) by assembler. > > > > To address this issue, we could add device specific ISA to device > details > > in GCC. Driver can pass additional option based on specific ISA that a > device > > has. Assembler can add device specific ISA to architecture ISA based on > the > > option it receives. > > > > I have attached patches for avr-gcc. > > > > device-specific-isa-avr-gcc.patch: > > * Device specific ISA information is added to device details. > > * avr-gcc passes -mrmw option to assembler if the selected device > > has RMW instruction support. > > I don't like additional option '-mrmw' because we already have a way > for passing device specific ISA. > IMHO better to add new avr_arch (ie atxmega128b1 is ARCH_AVRXMEGA6U) > GAS already have AVR_ISA_XMEGAU for RMW instructions.
New avr_arch can be added. But there are devices in avrxmega2, 4, 5, 6 and 7 architectures which has rmw instructions. In this case, new architecture required for above variants as well. Also there is DES instruction which is available only for few avr devices. So, I thought adding an option will avoid creating many new architectures. Related binutils PR: http://sourceware.org/PR15043 Related discussion: http://lists.nongnu.org/archive/html/avr-gcc-list/2014-03/msg00000.html Please suggest. Regards, Pitchumani
