On Mon, Feb 24, 2014 at 09:13:45AM +0000, James Greenhalgh wrote:
> *ping*, CCing Jakub.
*ping x2* This was OKed by ramana, but we wanted release manager approval.
I would have committed the patch as obvious if we were not in stage 4.
Thanks,
James
> On Wed, Feb 12, 2014 at 12:43:10PM +0000, Ramana Radhakrishnan wrote:
> > On 02/12/14 12:19, James Greenhalgh wrote:
> > >
> > > Hi,
> > >
> > > In aarch-common-protos.h we define a field in alu_cost_table:
> > >
> > > "extnd"
> > >
> > > On its own this is an upsetting optimization of the
> > > English language, but this trouble is compounded by the
> > > comment attached to this field throughout the cost tables
> > > themselves:
> > >
> > > /* Extend. */
> > >
> > > This patch fixes the spelling of extend to match that in the
> > > commemnts.
> > >
> > > I've checked that AArch64 and AArch32 build with this patch
> > > applied.
> > >
> > > OK for trunk/stage-1 (I don't mind which)?
> >
> > I am happy for this to go in now -
> >
> > Jakub ?
> >
> >
> > regards
> > Ramana
>
2014-03-19 James Greenhalgh <james.greenha...@arm.com>
* config/arm/aarch-common-protos.h
(alu_cost_table): Fix spelling of "extend".
* config/arm/arm.c (arm_new_rtx_costs): Fix spelling of "extend".
diff --git a/gcc/config/arm/aarch-common-protos.h
b/gcc/config/arm/aarch-common-protos.h
index 056fe56..a5ff6b4 100644
--- a/gcc/config/arm/aarch-common-protos.h
+++ b/gcc/config/arm/aarch-common-protos.h
@@ -48,8 +48,8 @@ struct alu_cost_table
const int arith_shift_reg; /* ... and when the shift is by a reg. */
const int log_shift; /* Additional when logic also shifts... */
const int log_shift_reg; /* ... and when the shift is by a reg. */
- const int extnd; /* Zero/sign extension. */
- const int extnd_arith; /* Extend and arith. */
+ const int extend; /* Zero/sign extension. */
+ const int extend_arith; /* Extend and arith. */
const int bfi; /* Bit-field insert. */
const int bfx; /* Bit-field extraction. */
const int clz; /* Count Leading Zeros. */
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index a68ed8d..31df089 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -9594,7 +9594,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum
rtx_code outer_code,
{
/* UXTA[BH] or SXTA[BH]. */
if (speed_p)
- *cost += extra_cost->alu.extnd_arith;
+ *cost += extra_cost->alu.extend_arith;
*cost += (rtx_cost (XEXP (XEXP (x, 0), 0), ZERO_EXTEND, 0,
speed_p)
+ rtx_cost (XEXP (x, 1), PLUS, 0, speed_p));
@@ -10311,7 +10311,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum
rtx_code outer_code,
*cost = COSTS_N_INSNS (1);
*cost += rtx_cost (XEXP (x, 0), code, 0, speed_p);
if (speed_p)
- *cost += extra_cost->alu.extnd;
+ *cost += extra_cost->alu.extend;
}
else if (GET_MODE (XEXP (x, 0)) != SImode)
{
@@ -10364,7 +10364,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum
rtx_code outer_code,
*cost = COSTS_N_INSNS (1);
*cost += rtx_cost (XEXP (x, 0), code, 0, speed_p);
if (speed_p)
- *cost += extra_cost->alu.extnd;
+ *cost += extra_cost->alu.extend;
}
else if (GET_MODE (XEXP (x, 0)) != SImode)
{
