On 23 April 2014 20:44, Alan Lawrence <alan.lawre...@arm.com> wrote:
> This patch (borrowing heavily from the ARM backend) makes
> aarch64_expand_vec_perm_const output REV instructions when appropriate,
> and then implements the vrev_XXX intrinsics in terms of __builtin_shuffle
> (which
> now produces the same assembly instructions).
>
> No regressions (and tests in previous patch
> http://gcc.gnu.org/ml/gcc-patches/2014-04/msg01468.html still passing) on
> aarch64-none-elf; also on aarch64_be-none-elf, where there are
> no regressions following testsuite config changes in
> http://gcc.gnu.org/ml/gcc-patches/2014-04/msg00579.html, but some "noise"
> (due
> to unexpected success in vectorization) without that patch.
>
> gcc/ChangeLog:
> 2014-04-23 Alan Lawrence <alan.lawre...@arm.com>
Two spaces after the date.
> * config/aarch64/iterators.md: add a REVERSE iterator and rev_op
> attribute for REV64/32/16 insns.
ChangeLog entries are sentences, therefore they start with a capital letter.
Identify the new definitions in parentheses. The ChangeLog entry just
states what changed, not why, any explanation required should be in
code comments or in the submission email, therefore:
* config/aarch64/iterators.md (REVERSE, rev_op): Define.
> * config/aarch64/aarch64-simd.md: add corresponding define_insn
> parameterized by REVERSE iterator.
... and this one should read something like:
* config/aarch64/aarch64-simd.md
(aarch64_rev<REVERSE:rev_op><mode>): Define.
The remaining entries should all be updated in a similar fashion...
> +
> +/* vrev */
> +
> +__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
> +vrev16_p8 (poly8x8_t a)
> +{
> + return __builtin_shuffle (a, (uint8x8_t) { 1, 0, 3, 2, 5, 4, 7, 6 });
> +}
This has the effect of reserving the symbol 'a', use __a instead. We
have other breakage like this in arm_neon.h which needs fixing but
that aside we should not be compounding the problem.
Cheers
/Marcus
