2014-05-08 17:04 GMT+04:00 Georg-Johann Lay <a...@gjlay.de>: > Some instructions like INC, DEC, NEG currently set cc0 to set_zn which is > not the whole story because they also set the V flag. This leads to a wrong > branch instruction in the remainder as cc0 is used. Fix is to do same as > clobber cc0. For the matter of clarity, I added a new cc0 alternative > set_vzn for that case. > > Moreover, ADIW sets cc0 to set_czn rather than set_zn. This is the same as > the action of a single ADD and like ADIW was modeled the old days (before > avr_out_plus_1 was introduced to print the output). > > No new regressions. > > Ok to apply? > > Johann > > > gcc/config/avr > PR target/61055 > * config/avr/avr.md (cc): Add new attribute set_vzn. > (addqi3, addqq3, adduqq3, subqi3, subqq3, subuqq3, negqi2) [cc]: > Set cc insn attribute to set_vzn instead of set_zn for alternatives > with INC, DEC or NEG. > * config/avr/avr.c (avr_notice_update_cc): Handle SET_VZN. > (avr_out_plus_1): ADIW sets cc0 to CC_SET_CZN. > INC, DEC and ADD+ADC set cc0 to CC_CLOBBER. > > gcc/testsuite/ > PR target/61055 > * gcc.target/avr/torture/pr61055.c: New test.
Please apply. Denis.
