On Sat, Jun 14, 2014 at 7:50 PM, Andrew Pinski <pins...@gmail.com> wrote:
> On Mon, Feb 24, 2014 at 1:18 AM, Zhenqiang Chen
> <zhenqiang.c...@linaro.org> wrote:
>> Hi,
>>
>> The patch (http://gcc.gnu.org/ml/gcc-patches/2014-11/msg03622.html) is
>> re-based (the arm port change is stripped as a separate patch), which
>> includes only the middle-end changes. The basic logic for the patch
>> is:
>>
>>   1) Identify conditional compare candidates when expanding one GIMPLE_COND.
>>   2) For a candidate, it uses two target hooks to generate the expected 
>> codes:
>>      - gen_ccmp_first expands the first compare in CCMP.
>>      - gen_ccmp_next expands the following compares.
>>
>>      Another hook select_ccmp_cmp_order is called to determine which compare
>>      is done first since not all combination of compares are legal in some
>>      target like ARM.  We might get more chance when swapping the compares.
>>      For AARCH64 and IA64, we do not need such check.
>>
>>      During expanding, we must make sure that no instruction can clobber the
>>      CC reg except the compares.
>>
>>      If the final result is not used in a COND_EXPR, it calls cstorecc4 
>> pattern
>>       to store the CC to a general register.
>>
>> Bootstrap and no make check regression on X86-64.
>
> I was testing this patch set out on AARCH64 with an addition patch to
> define cstorecc4 and found an issue:
> +  rtx target = gen_reg_rtx (word_mode);
> +  tmp = emit_cstore (target, icode, NE, CCmode, CCmode,
> +     0, tmp, const0_rtx, 1, word_mode);
> +  if (tmp)
> +    return tmp;
>
> The wrong mode is being used in the above code.
> The testcase is:
> _Bool f(int a, int b)
> {
>   return a != 0 && b != 0;
> }
> ---- CUT ----
>
> I am working on the patch to fix this issue.


I have a fix and it is unrelated really to this patch except it is
just exposed by it.  I will be submitting it in the next few days.

Thanks,
Andrew

>
> Thanks,
> Andrew
>
>
>>
>> Is is OK for next stage1?
>>
>> Thanks!
>> -Zhenqiang
>>
>> ChangeLog:
>> 2014-02-24  Zhenqiang Chen  <zhenqiang.c...@linaro.org>
>>
>>     * cfgexpand.c (expand_gimple_cond): Check ccmp support.
>>     * doc/md.texi (ccmp): New index.
>>     * doc/tm.texi (TARGET_SELECT_CCMP_CMP_ORDER, TARGET_GEN_CCMP_FIRST,
>>     TARGET_GEN_CCMP_NEXT): New hooks.
>>     * doc/tm.texi (TARGET_SELECT_CCMP_CMP_ORDER, TARGET_GEN_CCMP_FIRST,
>>     TARGET_GEN_CCMP_NEXT): New hooks.
>>     * doc/tm.texi.in (TARGET_SELECT_CCMP_CMP_ORDER, TARGET_GEN_CCMP_FIRST,
>>     TARGET_GEN_CCMP_NEXT): New hooks.
>>     * expmed.c (emit_cstore): Make it global.
>>     * expr.c: Include tree-phinodes.h and ssa-iterators.h.
>>     (ccmp_candidate_p, used_in_cond_stmt_p, check_clobber_cc, clobber_cc_p,
>>     gen_ccmp_next, expand_ccmp_expr_1, expand_ccmp_expr): New functions.
>>     (expand_expr_real_1): Handle conditional compare.
>>     * optabs.c (get_rtx_code): Make it global and handle BIT_AND_EXPR and
>>     BIT_IOR_EXPR.
>>     * optabs.h (get_rtx_code, emit_cstore): New prototypes.
>>     * recog.c (ccmp_insn_p): New function.
>>     (simplify_while_replacing): Do not swap ccmp insn.
>>     * target.def (select_ccmp_cmp_order, gen_ccmp_first, gen_ccmp_next):
>>     Define hooks.
>>     * targhooks.c (default_select_ccmp_cmp_order): New function.
>>     * targhooks.h (default_select_ccmp_cmp_order): New prototypes.

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