Hello! 2014-07-18 Uros Bizjak <ubiz...@gmail.com>
PR target/61794 * config/i386/sse.md (avx512f_vextract<shuffletype>32x4_1_maskm): Fix instruction constraint. (<mask_codefor>avx512f_vextract<shuffletype>32x4_1<mask_name>): Ditto. testsuite/ChangeLog: 2014-07-18 Uros Bizjak <ubiz...@gmail.com> PR target/61794 * gcc.target/i386/pr61794.c: New test. Bootstrapped and regression tested on x86_64-linux-gnu {,-m32} and committed to mainline and 4.9 branch. Uros.
Index: config/i386/sse.md =================================================================== --- config/i386/sse.md (revision 212817) +++ config/i386/sse.md (working copy) @@ -5892,9 +5892,10 @@ (match_operand 5 "const_0_to_15_operand")])) (match_operand:<ssequartermode> 6 "memory_operand" "0") (match_operand:QI 7 "register_operand" "Yk")))] - "TARGET_AVX512F && (INTVAL (operands[2]) = INTVAL (operands[3]) - 1) - && (INTVAL (operands[3]) = INTVAL (operands[4]) - 1) - && (INTVAL (operands[4]) = INTVAL (operands[5]) - 1)" + "TARGET_AVX512F + && (INTVAL (operands[2]) == (INTVAL (operands[3]) - 1) + && INTVAL (operands[3]) == (INTVAL (operands[4]) - 1) + && INTVAL (operands[4]) == (INTVAL (operands[5]) - 1))" { operands[2] = GEN_INT ((INTVAL (operands[2])) >> 2); return "vextract<shuffletype>32x4\t{%2, %1, %0%{%7%}|%0%{%7%}, %1, %2}"; @@ -5914,9 +5915,10 @@ (match_operand 3 "const_0_to_15_operand") (match_operand 4 "const_0_to_15_operand") (match_operand 5 "const_0_to_15_operand")])))] - "TARGET_AVX512F && (INTVAL (operands[2]) = INTVAL (operands[3]) - 1) - && (INTVAL (operands[3]) = INTVAL (operands[4]) - 1) - && (INTVAL (operands[4]) = INTVAL (operands[5]) - 1)" + "TARGET_AVX512F + && (INTVAL (operands[2]) == (INTVAL (operands[3]) - 1) + && INTVAL (operands[3]) == (INTVAL (operands[4]) - 1) + && INTVAL (operands[4]) == (INTVAL (operands[5]) - 1))" { operands[2] = GEN_INT ((INTVAL (operands[2])) >> 2); return "vextract<shuffletype>32x4\t{%2, %1, %0<mask_operand6>|%0<mask_operand6>, %1, %2}"; Index: testsuite/gcc.target/i386/pr61794.c =================================================================== --- testsuite/gcc.target/i386/pr61794.c (revision 0) +++ testsuite/gcc.target/i386/pr61794.c (working copy) @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512f" } */ + +#include <x86intrin.h> + +__m512i zmm; +__m128i xmm; + +void test (void) +{ + xmm = _mm512_extracti32x4_epi32 (zmm, 0); +}