Ping ^ 2? Thanks! -Zhenqiang
> -----Original Message----- > From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches- > ow...@gcc.gnu.org] On Behalf Of Zhenqiang Chen > Sent: Tuesday, April 29, 2014 5:38 PM > To: gcc-patches@gcc.gnu.org > Cc: Ramana Radhakrishnan > Subject: [PING] [PATCH, ARM] Set max_insns_skipped to > MAX_INSN_PER_IT_BLOCK when optimize_size for THUMB2 > > Ping? OK for trunk? > > Thanks! > -Zhenqiang > > > -----Original Message----- > > From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches- > > ow...@gcc.gnu.org] On Behalf Of Zhenqiang Chen > > Sent: Tuesday, February 25, 2014 5:35 PM > > To: gcc-patches@gcc.gnu.org > > Cc: Ramana Radhakrishnan > > Subject: [PATCH, ARM] Set max_insns_skipped to > MAX_INSN_PER_IT_BLOCK > > when optimize_size for THUMB2 > > > > Hi, > > > > Current value for max_insns_skipped is 6. For THUMB2, it needs 2 > > (IF-THEN) or 3 (IF-THEN-ELSE) IT blocks to hold all the instructions. > > The overhead > of IT is > > 4 or 6 BYTES. > > > > If we do not generate IT blocks, for IF-THEN, the overhead of > > conditional jump is 2 or 4; for IF-THEN-ELSE, the overhead is 4, 6, or 8. > > > > Most THUMB2 jump instructions are 2 BYTES. Tests on CSiBE show no one > > file has code size regression. So The patch sets max_insns_skipped to > > MAX_INSN_PER_IT_BLOCK. > > > > No make check regression on cortex-m3. > > For CSiBE, no any file has code size regression. And overall there is > >0.01% code size improvement for cortex-a9 and cortex-m4. > > > > Is it OK? > > > > Thanks! > > -Zhenqiang > > > > 2014-02-25 Zhenqiang Chen <zhenqiang.c...@arm.com> > > > > * config/arm/arm.c (arm_option_override): Set max_insns_skipped > > to MAX_INSN_PER_IT_BLOCK when optimize_size for THUMB2. > > > > testsuite/ChangeLog: > > 2014-02-25 Zhenqiang Chen <zhenqiang.c...@arm.com> > > > > * gcc.target/arm/max-insns-skipped.c: New test. > > > > diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index > > b49f43e..99cdbc4 100644 > > --- a/gcc/config/arm/arm.c > > +++ b/gcc/config/arm/arm.c > > @@ -2743,6 +2743,15 @@ arm_option_override (void) > > /* If optimizing for size, bump the number of instructions that we > > are prepared to conditionally execute (even on a StrongARM). */ > > max_insns_skipped = 6; > > + > > + /* For THUMB2, it needs 2 (IF-THEN) or 3 (IF-THEN-ELSE) IT > > + blocks > to > > + hold all the instructions. The overhead of IT is 4 or 6 BYTES. > > + If we do not generate IT blocks, for IF-THEN, the overhead of > > + conditional jump is 2 or 4; for IF-THEN-ELSE, the overhead is 4, 6 > > + or 8. Most THUMB2 jump instructions are 2 BYTES. > > + So set max_insns_skipped to MAX_INSN_PER_IT_BLOCK. */ > > + if (TARGET_THUMB2) > > + max_insns_skipped = MAX_INSN_PER_IT_BLOCK; > > } > > else > > max_insns_skipped = current_tune->max_insns_skipped; diff --git > > a/gcc/testsuite/gcc.target/arm/max-insns-skipped.c > > b/gcc/testsuite/gcc.target/arm/max-insns-skipped.c > > new file mode 100644 > > index 0000000..0a11554 > > --- /dev/null > > +++ b/gcc/testsuite/gcc.target/arm/max-insns-skipped.c > > @@ -0,0 +1,21 @@ > > +/* { dg-do assemble { target arm_thumb2 } } */ > > +/* { dg-options " -Os " } */ > > + > > +int t (int a, int b, int c, int d) > > +{ > > + int r; > > + if (a > 0) { > > + r = a + b; > > + r += 0x456; > > + r *= 0x1234567; > > + } > > + else { > > + r = b - a; > > + r -= 0x123; > > + r *= 0x12387; > > + r += d; > > + } > > + return r; > > +} > > + > > +/* { dg-final { object-size text <= 40 } } */ > > > > > > > > > >
