Hi There,
This is the first patch to enable GCC generate UAL assembly code for Thumb1
target. This new option enables user to specify which syntax is used in
their inline assembly code. If the inline assembly code uses UAL format,
then gcc does nothing because gcc generates UAL code as well. If the inline
assembly code uses non-UAL, then gcc will insert some directives in final
assembly code. Is it ok to trunk?
BR,
Terry
2014-10-21 Terry Guo <terry....@arm.com>
* config/arm/arm.h (TARGET_UNIFIED_ASM): Also include thumb1.
(ASM_APP_ON): Redefined.
* config/arm/arm.c (arm_option_override): Thumb2 always uses UAL
for inline assembly code.
* config/arm/arm.opt (masm-syntax-unified): New option.
* doc/invoke.texi (-masm-syntax-unified): Document new option.diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index 3623c70..e654e22 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -165,6 +165,8 @@ extern char arm_arch_name[];
} \
if (TARGET_IDIV) \
builtin_define ("__ARM_ARCH_EXT_IDIV__"); \
+ if (inline_asm_unified) \
+ builtin_define ("__ARM_ASM_SYNTAX_UNIFIED__");\
} while (0)
#include "config/arm/arm-opts.h"
@@ -348,8 +350,8 @@ extern void (*arm_lang_output_object_attributes_hook)(void);
|| (!optimize_size && !current_tune->prefer_constant_pool)))
/* We could use unified syntax for arm mode, but for now we just use it
- for Thumb-2. */
-#define TARGET_UNIFIED_ASM TARGET_THUMB2
+ for thumb mode. */
+#define TARGET_UNIFIED_ASM (TARGET_THUMB)
/* Nonzero if this chip provides the DMB instruction. */
#define TARGET_HAVE_DMB (arm_arch6m || arm_arch7)
@@ -2144,8 +2146,13 @@ extern int making_const_table;
#define CC_STATUS_INIT \
do { cfun->machine->thumb1_cc_insn = NULL_RTX; } while (0)
+#undef ASM_APP_ON
+#define ASM_APP_ON (inline_asm_unified ? "\t.syntax unified" : \
+ "\t.syntax divided\n")
+
#undef ASM_APP_OFF
-#define ASM_APP_OFF (TARGET_ARM ? "" : "\t.thumb\n")
+#define ASM_APP_OFF (TARGET_ARM ? "\t.arm\n\t.syntax divided\n" : \
+ "\t.thumb\n\t.syntax unified\n")
/* Output a push or a pop instruction (only used when profiling).
We can't push STATIC_CHAIN_REGNUM (r12) directly with Thumb-1. We know
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 1ee0eb3..9ccf73c 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -3121,6 +3121,11 @@ arm_option_override (void)
if (target_slow_flash_data)
arm_disable_literal_pool = true;
+ /* Thumb2 inline assembly code should always use unified syntax.
+ This will apply to ARM and Thumb1 eventually. */
+ if (TARGET_THUMB2)
+ inline_asm_unified = 1;
+
/* Register global variables with the garbage collector. */
arm_add_gc_roots ();
}
diff --git a/gcc/config/arm/arm.opt b/gcc/config/arm/arm.opt
index 0a80513..50f4c7d 100644
--- a/gcc/config/arm/arm.opt
+++ b/gcc/config/arm/arm.opt
@@ -271,3 +271,7 @@ Use Neon to perform 64-bits operations rather than core
registers.
mslow-flash-data
Target Report Var(target_slow_flash_data) Init(0)
Assume loading data from flash is slower than fetching instructions.
+
+masm-syntax-unified
+Target Report Var(inline_asm_unified) Init(0)
+Assume unified syntax for Thumb inline assembly code.
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 23f272f..c30c858 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -545,6 +545,7 @@ Objective-C and Objective-C++ Dialects}.
-munaligned-access @gol
-mneon-for-64bits @gol
-mslow-flash-data @gol
+-masm-syntax-unified @gol
-mrestrict-it}
@emph{AVR Options}
@@ -12954,6 +12955,14 @@ Therefore literal load is minimized for better
performance.
This option is only supported when compiling for ARMv7 M-profile and
off by default.
+@item -masm-syntax-unified
+@opindex masm-syntax-unified
+Assume the Thumb1 inline assembly code are using unified syntax.
+The default is currently off, which means divided syntax is assumed.
+However, this may change in future releases of GCC. Divided syntax
+should be considered deprecated. This option has no effect when
+generating Thumb2 code. Thumb2 assembly code always uses unified syntax.
+
@item -mrestrict-it
@opindex mrestrict-it
Restricts generation of IT blocks to conform to the rules of ARMv8.
