Hi, To make aarch64.c a little smaller and a little easier to understand, I have moved the rest of the cost tables (cpu_addrcost_table, cpu_regmove_cost, cpu_vector_cost) to aarch64-cost-tables. I also fixed up the inconstancy in the use of __extension__ on some of the structures and not all of them. I used a define to allow it easier instead of having to have "#if HAVE_DESIGNATED_INITIALIZERS && GCC_VERSION >= 2007" each time.
OK? Build and tested on aarch64-elf with no regressions. Thanks, Andrew Pinski ChangeLog: * config/aarch64/aarch64-cost-tables.h (NAMED_PARAM): New define. (NEED_EXTENSION): New define. (generic_addrcost_table): Moved from aarch64.c. (cortexa57_addrcost_table): Likewise. (generic_regmove_cost): Likewise. (cortexa57_regmove_cost): Likewise. (cortexa53_regmove_cost): Likewise. (thunderx_regmove_cost): Likewise. (generic_vector_cost): Likewise. (cortexa57_vector_cost): Likewise. * config/aarch64/aarch64.c (NAMED_PARAM): Delete, moved to aarch64-cost-tables.h. (generic_addrcost_table): Likewise. (cortexa57_addrcost_table): Likewise. (generic_regmove_cost): Likewise. (cortexa57_regmove_cost): Likewise. (cortexa53_regmove_cost): Likewise. (thunderx_regmove_cost): Likewise. (generic_vector_cost): Likewise. (cortexa57_vector_cost): Likewise. (generic_tunings): Use NEED_EXTENSION. (cortexa53_tunings): Likewise. (cortexa57_tunings): Likewise. (thunderx_tunings): Likewise.
Index: config/aarch64/aarch64-cost-tables.h =================================================================== --- config/aarch64/aarch64-cost-tables.h (revision 216524) +++ config/aarch64/aarch64-cost-tables.h (working copy) @@ -125,7 +125,135 @@ const struct cpu_cost_table thunderx_ext } }; +#if HAVE_DESIGNATED_INITIALIZERS +#define NAMED_PARAM(NAME, VAL) .NAME = (VAL) +#else +#define NAMED_PARAM(NAME, VAL) (VAL) +#endif + +#if HAVE_DESIGNATED_INITIALIZERS && GCC_VERSION >= 2007 +#define NEED_EXTENSION __extension__ +#else +#define NEED_EXTENSION +#endif + + +/* The address cost models. */ +NEED_EXTENSION +static const struct cpu_addrcost_table generic_addrcost_table = +{ +#if HAVE_DESIGNATED_INITIALIZERS + .addr_scale_costs = +#endif + { + NAMED_PARAM (hi, 0), + NAMED_PARAM (si, 0), + NAMED_PARAM (di, 0), + NAMED_PARAM (ti, 0), + }, + NAMED_PARAM (pre_modify, 0), + NAMED_PARAM (post_modify, 0), + NAMED_PARAM (register_offset, 0), + NAMED_PARAM (register_extend, 0), + NAMED_PARAM (imm_offset, 0) +}; + +NEED_EXTENSION +static const struct cpu_addrcost_table cortexa57_addrcost_table = +{ +#if HAVE_DESIGNATED_INITIALIZERS + .addr_scale_costs = +#endif + { + NAMED_PARAM (hi, 1), + NAMED_PARAM (si, 0), + NAMED_PARAM (di, 0), + NAMED_PARAM (ti, 1), + }, + NAMED_PARAM (pre_modify, 0), + NAMED_PARAM (post_modify, 0), + NAMED_PARAM (register_offset, 0), + NAMED_PARAM (register_extend, 0), + NAMED_PARAM (imm_offset, 0), +}; + + +/* Register to Register move costs */ +NEED_EXTENSION +static const struct cpu_regmove_cost generic_regmove_cost = +{ + NAMED_PARAM (GP2GP, 1), + NAMED_PARAM (GP2FP, 2), + NAMED_PARAM (FP2GP, 2), + NAMED_PARAM (FP2FP, 2) +}; + +NEED_EXTENSION +static const struct cpu_regmove_cost cortexa57_regmove_cost = +{ + NAMED_PARAM (GP2GP, 1), + /* Avoid the use of slow int<->fp moves for spilling by setting + their cost higher than memmov_cost. */ + NAMED_PARAM (GP2FP, 5), + NAMED_PARAM (FP2GP, 5), + NAMED_PARAM (FP2FP, 2) +}; + +NEED_EXTENSION +static const struct cpu_regmove_cost cortexa53_regmove_cost = +{ + NAMED_PARAM (GP2GP, 1), + /* Avoid the use of slow int<->fp moves for spilling by setting + their cost higher than memmov_cost. */ + NAMED_PARAM (GP2FP, 5), + NAMED_PARAM (FP2GP, 5), + NAMED_PARAM (FP2FP, 2) +}; + +NEED_EXTENSION +static const struct cpu_regmove_cost thunderx_regmove_cost = +{ + NAMED_PARAM (GP2GP, 2), + NAMED_PARAM (GP2FP, 2), + NAMED_PARAM (FP2GP, 6), + NAMED_PARAM (FP2FP, 4) +}; + +/* Vector instruction cost model */ +NEED_EXTENSION +static const struct cpu_vector_cost generic_vector_cost = +{ + NAMED_PARAM (scalar_stmt_cost, 1), + NAMED_PARAM (scalar_load_cost, 1), + NAMED_PARAM (scalar_store_cost, 1), + NAMED_PARAM (vec_stmt_cost, 1), + NAMED_PARAM (vec_to_scalar_cost, 1), + NAMED_PARAM (scalar_to_vec_cost, 1), + NAMED_PARAM (vec_align_load_cost, 1), + NAMED_PARAM (vec_unalign_load_cost, 1), + NAMED_PARAM (vec_unalign_store_cost, 1), + NAMED_PARAM (vec_store_cost, 1), + NAMED_PARAM (cond_taken_branch_cost, 3), + NAMED_PARAM (cond_not_taken_branch_cost, 1) +}; + +NEED_EXTENSION +static const struct cpu_vector_cost cortexa57_vector_cost = +{ + NAMED_PARAM (scalar_stmt_cost, 1), + NAMED_PARAM (scalar_load_cost, 4), + NAMED_PARAM (scalar_store_cost, 1), + NAMED_PARAM (vec_stmt_cost, 3), + NAMED_PARAM (vec_to_scalar_cost, 8), + NAMED_PARAM (scalar_to_vec_cost, 8), + NAMED_PARAM (vec_align_load_cost, 5), + NAMED_PARAM (vec_unalign_load_cost, 5), + NAMED_PARAM (vec_unalign_store_cost, 1), + NAMED_PARAM (vec_store_cost, 1), + NAMED_PARAM (cond_taken_branch_cost, 1), + NAMED_PARAM (cond_not_taken_branch_cost, 1) +}; #endif Index: config/aarch64/aarch64.c =================================================================== --- config/aarch64/aarch64.c (revision 216524) +++ config/aarch64/aarch64.c (working copy) @@ -157,142 +157,8 @@ unsigned long aarch64_isa_flags = 0; /* Mask to specify which instruction scheduling options should be used. */ unsigned long aarch64_tune_flags = 0; -/* Tuning parameters. */ - -#if HAVE_DESIGNATED_INITIALIZERS -#define NAMED_PARAM(NAME, VAL) .NAME = (VAL) -#else -#define NAMED_PARAM(NAME, VAL) (VAL) -#endif - -#if HAVE_DESIGNATED_INITIALIZERS && GCC_VERSION >= 2007 -__extension__ -#endif - -#if HAVE_DESIGNATED_INITIALIZERS && GCC_VERSION >= 2007 -__extension__ -#endif -static const struct cpu_addrcost_table generic_addrcost_table = -{ -#if HAVE_DESIGNATED_INITIALIZERS - .addr_scale_costs = -#endif - { - NAMED_PARAM (hi, 0), - NAMED_PARAM (si, 0), - NAMED_PARAM (di, 0), - NAMED_PARAM (ti, 0), - }, - NAMED_PARAM (pre_modify, 0), - NAMED_PARAM (post_modify, 0), - NAMED_PARAM (register_offset, 0), - NAMED_PARAM (register_extend, 0), - NAMED_PARAM (imm_offset, 0) -}; - -#if HAVE_DESIGNATED_INITIALIZERS && GCC_VERSION >= 2007 -__extension__ -#endif -static const struct cpu_addrcost_table cortexa57_addrcost_table = -{ -#if HAVE_DESIGNATED_INITIALIZERS - .addr_scale_costs = -#endif - { - NAMED_PARAM (hi, 1), - NAMED_PARAM (si, 0), - NAMED_PARAM (di, 0), - NAMED_PARAM (ti, 1), - }, - NAMED_PARAM (pre_modify, 0), - NAMED_PARAM (post_modify, 0), - NAMED_PARAM (register_offset, 0), - NAMED_PARAM (register_extend, 0), - NAMED_PARAM (imm_offset, 0), -}; - -#if HAVE_DESIGNATED_INITIALIZERS && GCC_VERSION >= 2007 -__extension__ -#endif -static const struct cpu_regmove_cost generic_regmove_cost = -{ - NAMED_PARAM (GP2GP, 1), - NAMED_PARAM (GP2FP, 2), - NAMED_PARAM (FP2GP, 2), - NAMED_PARAM (FP2FP, 2) -}; - -static const struct cpu_regmove_cost cortexa57_regmove_cost = -{ - NAMED_PARAM (GP2GP, 1), - /* Avoid the use of slow int<->fp moves for spilling by setting - their cost higher than memmov_cost. */ - NAMED_PARAM (GP2FP, 5), - NAMED_PARAM (FP2GP, 5), - NAMED_PARAM (FP2FP, 2) -}; - -static const struct cpu_regmove_cost cortexa53_regmove_cost = -{ - NAMED_PARAM (GP2GP, 1), - /* Avoid the use of slow int<->fp moves for spilling by setting - their cost higher than memmov_cost. */ - NAMED_PARAM (GP2FP, 5), - NAMED_PARAM (FP2GP, 5), - NAMED_PARAM (FP2FP, 2) -}; - -static const struct cpu_regmove_cost thunderx_regmove_cost = -{ - NAMED_PARAM (GP2GP, 2), - NAMED_PARAM (GP2FP, 2), - NAMED_PARAM (FP2GP, 6), - NAMED_PARAM (FP2FP, 4) -}; - -/* Generic costs for vector insn classes. */ -#if HAVE_DESIGNATED_INITIALIZERS && GCC_VERSION >= 2007 -__extension__ -#endif -static const struct cpu_vector_cost generic_vector_cost = -{ - NAMED_PARAM (scalar_stmt_cost, 1), - NAMED_PARAM (scalar_load_cost, 1), - NAMED_PARAM (scalar_store_cost, 1), - NAMED_PARAM (vec_stmt_cost, 1), - NAMED_PARAM (vec_to_scalar_cost, 1), - NAMED_PARAM (scalar_to_vec_cost, 1), - NAMED_PARAM (vec_align_load_cost, 1), - NAMED_PARAM (vec_unalign_load_cost, 1), - NAMED_PARAM (vec_unalign_store_cost, 1), - NAMED_PARAM (vec_store_cost, 1), - NAMED_PARAM (cond_taken_branch_cost, 3), - NAMED_PARAM (cond_not_taken_branch_cost, 1) -}; - -/* Generic costs for vector insn classes. */ -#if HAVE_DESIGNATED_INITIALIZERS && GCC_VERSION >= 2007 -__extension__ -#endif -static const struct cpu_vector_cost cortexa57_vector_cost = -{ - NAMED_PARAM (scalar_stmt_cost, 1), - NAMED_PARAM (scalar_load_cost, 4), - NAMED_PARAM (scalar_store_cost, 1), - NAMED_PARAM (vec_stmt_cost, 3), - NAMED_PARAM (vec_to_scalar_cost, 8), - NAMED_PARAM (scalar_to_vec_cost, 8), - NAMED_PARAM (vec_align_load_cost, 5), - NAMED_PARAM (vec_unalign_load_cost, 5), - NAMED_PARAM (vec_unalign_store_cost, 1), - NAMED_PARAM (vec_store_cost, 1), - NAMED_PARAM (cond_taken_branch_cost, 1), - NAMED_PARAM (cond_not_taken_branch_cost, 1) -}; - -#if HAVE_DESIGNATED_INITIALIZERS && GCC_VERSION >= 2007 -__extension__ -#endif +/* The tuning structures. The cost model tables are in aarch64-cost-tables.h */ +NEED_EXTENSION static const struct tune_params generic_tunings = { &cortexa57_extra_costs, @@ -303,6 +169,7 @@ static const struct tune_params generic_ NAMED_PARAM (issue_rate, 2) }; +NEED_EXTENSION static const struct tune_params cortexa53_tunings = { &cortexa53_extra_costs, @@ -313,6 +180,7 @@ static const struct tune_params cortexa5 NAMED_PARAM (issue_rate, 2) }; +NEED_EXTENSION static const struct tune_params cortexa57_tunings = { &cortexa57_extra_costs, @@ -323,6 +191,7 @@ static const struct tune_params cortexa5 NAMED_PARAM (issue_rate, 3) }; +NEED_EXTENSION static const struct tune_params thunderx_tunings = { &thunderx_extra_costs,