> On Thu, Nov 13, 2014 at 2:33 PM, Yangfei (Felix) <felix.y...@huawei.com>
> wrote:
> >> Hi,
> >> As commented at
> >> https://gcc.gnu.org/ml/gcc-patches/2014-09/msg00684.html,
> >> this is a simple patch enabling neon memset inlining on
> >> cortex-a53/cortex-a57 in AArch32 mode.
> >>
> >> Test on
> >> arm-none-linux-gnueabihf/--with-cpu=cortex-a57/--with-fpu=crypto-neon
> >> -fp-ar
> >> m
> >> v8/--with-float=hard. I will further collect benchmark data, see if
> >> there is regression.
> >>
> >> Is it ok if benchmark results are good?
> >>
> >> 2014-11-13 Bin Cheng <bin.ch...@arm.com>
> >>
> >> * config/arm/arm.c (arm_cortex_a53_tune, arm_cortex_a57_tune):
> >> Prefer
> >> neon for stringops on cortex-a53/a57 in AArch32 mode.
> >
> >
> > Just curious about this. Can we make sure that FPAdvSIMD are always
> enabled?
> >
>
> I am not sure I understand correct, do you mean enable options like below
> default?
> --with-fpu=crypto-neon-fp-armv8/--with-float=hard
>
> Thanks,
> bin
I mean the NEON hardware. The processor checks if the FPAdvSIMD is enabled
when executing an NEON instruction.
aarch64/exceptions/traps/functions/AArch64.CheckFPAdvSIMDEnabled
// AArch64.CheckFPAdvSIMDEnabled()
// ===============================
// Check against CPACR_EL1.
AArch64.CheckFPAdvSIMDEnabled()
if PSTATE.EL IN {EL0, EL1} then
// Check if access disabled in CPACR_EL1
case CPACR_EL1.FPEN of
when 'x0' disabled = TRUE;
when '01' disabled = PSTATE.EL == EL0;
when '11' disabled = FALSE;
if disabled then AArch64.AdvSIMDFPAccessTrap(EL1);
AArch64.CheckFPAdvSIMDTrap(); // Also check against CPTR_EL2 and CPTR_EL3
