I've backported this fix to 4.8 & 4.9 branch.
These patches have been tested for armeb-none-eabi-gcc/g++ with qemu, and both the test results were ok.
--- gcc/ChangeLog.ori   2014-11-28 17:30:43.000000000 +0800
+++ gcc/ChangeLog       2014-11-28 17:30:55.000000000 +0800
@@ -1,3 +1,15 @@
+2014-11-28  Felix Yang  <felix.y...@huawei.com>
+           Shanyao Chen  <chenshan...@huawei.com>
+
+        Backport from mainline
+        2014-11-19  Felix Yang  <felix.y...@huawei.com>
+                    Shanyao Chen  <chenshan...@huawei.com>
+
+        PR target/59593
+        * config/arm/arm.md (define_attr "arch"): Add v6t2.
+        (define_attr "arch_enabled"): Add test for the above.
+        (*movhi_insn_arch4): Add new alternative.
+
 2014-11-19  Uros Bizjak  <ubiz...@gmail.com>
 
        PR target/63947
--- gcc/config/arm/arm.md.ori   2014-11-28 17:33:12.000000000 +0800
+++ gcc/config/arm/arm.md       2014-11-29 10:34:28.000000000 +0800
@@ -92,9 +92,11 @@
 ; This can be "a" for ARM, "t" for either of the Thumbs, "32" for
 ; TARGET_32BIT, "t1" or "t2" to specify a specific Thumb mode.  "v6"
 ; for ARM or Thumb-2 with arm_arch6, and nov6 for ARM without
-; arm_arch6.  This attribute is used to compute attribute "enabled",
-; use type "any" to enable an alternative in all cases.
-(define_attr "arch" 
"any,a,t,32,t1,t2,v6,nov6,onlya8,neon_onlya8,nota8,neon_nota8,iwmmxt,iwmmxt2"
+; arm_arch6.  "v6t2" for Thumb-2 with arm_arch6.  This attribute is
+; used to compute attribute "enabled", use type "any" to enable an
+; alternative in all cases.
+
+(define_attr "arch" 
"any,a,t,32,t1,t2,v6,nov6,v6t2,onlya8,neon_onlya8,nota8,neon_nota8,iwmmxt,iwmmxt2"
   (const_string "any"))
 
 (define_attr "arch_enabled" "no,yes"
@@ -129,6 +131,10 @@
              (match_test "TARGET_32BIT && !arm_arch6"))
         (const_string "yes")
 
+        (and (eq_attr "arch" "v6t2")
+             (match_test "TARGET_32BIT && arm_arch6 && arm_arch_thumb2"))
+        (const_string "yes")
+
         (and (eq_attr "arch" "onlya8")
              (eq_attr "tune" "cortexa8"))
         (const_string "yes")
@@ -6282,8 +6288,8 @@
 
 ;; Pattern to recognize insn generated default case above
 (define_insn "*movhi_insn_arch4"
-  [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,m,r")
-       (match_operand:HI 1 "general_operand"      "rI,K,r,mi"))]
+  [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,r,m,r")
+       (match_operand:HI 1 "general_operand"      "rI,K,n,r,mi"))]
   "TARGET_ARM
    && arm_arch4
    && (register_operand (operands[0], HImode)
@@ -6291,17 +6297,20 @@
   "@
    mov%?\\t%0, %1\\t%@ movhi
    mvn%?\\t%0, #%B1\\t%@ movhi
+   movw%?\\t%0, %L1\\t%@ movhi
    str%(h%)\\t%1, %0\\t%@ movhi
    ldr%(h%)\\t%0, %1\\t%@ movhi"
   [(set_attr "predicable" "yes")
-   (set_attr "insn" "mov,mvn,*,*")
-   (set_attr "pool_range" "*,*,*,256")
-   (set_attr "neg_pool_range" "*,*,*,244")
+   (set_attr "insn" "mov,mvn,mov,*,*")
+   (set_attr "pool_range" "*,*,*,*,256")
+   (set_attr "neg_pool_range" "*,*,*,*,244")
+   (set_attr "arch" "*,*,v6t2,*,*")
    (set_attr_alternative "type"
                          [(if_then_else (match_operand 1 "const_int_operand" 
"")
                                         (const_string "simple_alu_imm" )
                                         (const_string "*"))
                           (const_string "simple_alu_imm")
+                          (const_string "simple_alu_imm")
                           (const_string "store1")
                           (const_string "load1")])]
 )
--- gcc/ChangeLog.ori   2014-11-28 17:20:38.000000000 +0800
+++ gcc/ChangeLog       2014-11-28 17:21:14.000000000 +0800
@@ -1,3 +1,15 @@
+2014-11-28  Felix Yang  <felix.y...@huawei.com>
+           Shanyao Chen  <chenshan...@huawei.com>
+
+        Backport from mainline
+        2014-11-19  Felix Yang  <felix.y...@huawei.com>
+                    Shanyao Chen  <chenshan...@huawei.com>
+
+        PR target/59593
+        * config/arm/arm.md (define_attr "arch"): Add v6t2.
+        (define_attr "arch_enabled"): Add test for the above.
+        (*movhi_insn_arch4): Add new alternative.
+
 2014-11-26  Richard Biener  <rguent...@suse.de>
 
        PR middle-end/63738
--- gcc/config/arm/arm.md.ori   2014-11-28 09:34:21.000000000 +0800
+++ gcc/config/arm/arm.md       2014-11-29 10:28:13.000000000 +0800
@@ -125,9 +125,10 @@
 ; This can be "a" for ARM, "t" for either of the Thumbs, "32" for
 ; TARGET_32BIT, "t1" or "t2" to specify a specific Thumb mode.  "v6"
 ; for ARM or Thumb-2 with arm_arch6, and nov6 for ARM without
-; arm_arch6.  This attribute is used to compute attribute "enabled",
-; use type "any" to enable an alternative in all cases.
-(define_attr "arch" 
"any,a,t,32,t1,t2,v6,nov6,neon_for_64bits,avoid_neon_for_64bits,iwmmxt,iwmmxt2"
+; arm_arch6.  "v6t2" for Thumb-2 with arm_arch6.  This attribute is
+; used to compute attribute "enabled", use type "any" to enable an
+; alternative in all cases.
+(define_attr "arch" 
"any,a,t,32,t1,t2,v6,nov6,v6t2,neon_for_64bits,avoid_neon_for_64bits,iwmmxt,iwmmxt2"
   (const_string "any"))
 
 (define_attr "arch_enabled" "no,yes"
@@ -162,6 +163,10 @@
              (match_test "TARGET_32BIT && !arm_arch6"))
         (const_string "yes")
 
+        (and (eq_attr "arch" "v6t2")
+             (match_test "TARGET_32BIT && arm_arch6 && arm_arch_thumb2"))
+        (const_string "yes")
+
         (and (eq_attr "arch" "avoid_neon_for_64bits")
              (match_test "TARGET_NEON")
              (not (match_test "TARGET_PREFER_NEON_64BITS")))
@@ -6961,8 +6966,8 @@
 
 ;; Pattern to recognize insn generated default case above
 (define_insn "*movhi_insn_arch4"
-  [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,m,r")
-       (match_operand:HI 1 "general_operand"      "rI,K,r,mi"))]
+  [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,r,m,r")
+       (match_operand:HI 1 "general_operand"      "rI,K,n,r,mi"))]
   "TARGET_ARM
    && arm_arch4
    && (register_operand (operands[0], HImode)
@@ -6970,16 +6975,19 @@
   "@
    mov%?\\t%0, %1\\t%@ movhi
    mvn%?\\t%0, #%B1\\t%@ movhi
+   movw%?\\t%0, %L1\\t%@ movhi
    str%(h%)\\t%1, %0\\t%@ movhi
    ldr%(h%)\\t%0, %1\\t%@ movhi"
   [(set_attr "predicable" "yes")
-   (set_attr "pool_range" "*,*,*,256")
-   (set_attr "neg_pool_range" "*,*,*,244")
+   (set_attr "pool_range" "*,*,*,*,256")
+   (set_attr "neg_pool_range" "*,*,*,*,244")
+   (set_attr "arch" "*,*,v6t2,*,*")
    (set_attr_alternative "type"
                          [(if_then_else (match_operand 1 "const_int_operand" 
"")
                                         (const_string "mov_imm" )
                                         (const_string "mov_reg"))
                           (const_string "mvn_imm")
+                          (const_string "mov_imm")
                           (const_string "store1")
                           (const_string "load1")])]
 )

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