The following patch fixes testsuite failures
builtin-arith-overflow-[10,11].c. In the case where
rs6000_split_logical() was being called the operands were swapped such
that the wrong operand was being complemented.
Bootstrap/tested on powerpc64-linux with no new regressions. Ok for
trunk (and 4.9/4.8 after bootstrap/regtest)?
2014-12-18 Pat Haugen <pthau...@us.ibm.com>
* config/rs6000/rs6000.md (boolc<mode>3_internal1): Fix operand
ordering.
Index: gcc/config/rs6000/rs6000.md
===================================================================
--- gcc/config/rs6000/rs6000.md (revision 218827)
+++ gcc/config/rs6000/rs6000.md (working copy)
@@ -7554,19 +7554,21 @@ (define_insn_and_split "*bool<mode>3_int
(const_string "16"))))])
;; 128-bit ANDC/ORC
+;; In the case where rs6000_split_logical is called, the NOT'd operand
+;; must be opnd1 in order for the split insns to be recognized.
(define_insn_and_split "*boolc<mode>3_internal1"
[(set (match_operand:BOOL_128 0 "vlogical_operand" "=<BOOL_REGS_OUTPUT>")
(match_operator:BOOL_128 3 "boolean_operator"
[(not:BOOL_128
- (match_operand:BOOL_128 2 "vlogical_operand" "<BOOL_REGS_OP1>"))
- (match_operand:BOOL_128 1 "vlogical_operand" "<BOOL_REGS_OP2>")]))]
+ (match_operand:BOOL_128 1 "vlogical_operand" "<BOOL_REGS_OP1>"))
+ (match_operand:BOOL_128 2 "vlogical_operand" "<BOOL_REGS_OP2>")]))]
"TARGET_P8_VECTOR || (GET_CODE (operands[3]) == AND)"
{
if (TARGET_VSX && vsx_register_operand (operands[0], <MODE>mode))
- return "xxl%q3 %x0,%x1,%x2";
+ return "xxl%q3 %x0,%x2,%x1";
if (TARGET_ALTIVEC && altivec_register_operand (operands[0], <MODE>mode))
- return "v%q3 %0,%1,%2";
+ return "v%q3 %0,%2,%1";
return "#";
}
