On Tue, 2005-04-19 at 08:49 +0200, Eric Botcazou wrote: > > So the combination of the TCB merge plus the pending jump threading > > changes apparently has ticked a reload bug which manifests itself with > > the stage1 compiler mis-compiling the stage2 compiler. > > > > [...] > > > > Which faults because the memory location is actually read-only memory. > > PR rtl-optimization/15248. Ah. Good. I was having a bloody hard time believing we hadn't run into this before.
> > > What's not clear to me is how best to fix this. > > > > We could try to delete all assignments to pseudos which are equivalent > > to MEMs. > > > > We could avoid recording equivalences when the pseudo is set more than > > once. > > > > Other possibilities? > > For 3.3 and 3.4, this was "fixed" by not recording memory equivalences that > have the infamous RTX_UNCHANGING_P flag set. Also a possibility. Making the equivalent change (!MEM_READONLY_P) appears to do the trick for mainline. Jeff
