_On 05-Jul-2005 00:14, Ian Lance Taylor san wrote_:
Steven Bosscher <[EMAIL PROTECTED]> writes:
So you have a few instructions bundled into a VLIW instruction, and
one of the instructions in the bundle is moved into the delay slot,
thus breaking your VLIW bundle. Right?
I think there are two natural approaches.
1) Do the VLIW bundling after delayed branch scheduling. The way to
do that is to the bundling in TARGET_ASM_FUNCTION_PROLOGUE. The
FRV backend does this. I've done this successfully in the past.
I think this is a good workaround but nullifying the possibility of having a
VLIW bundled instruction in a branch delay slot.
2) When you do the VLIW bundling, put the instructions into a
PARALLEL.
I think this is the right solution which rectifies the problems. Please provide
the pointer to where it has to be done.
In general the gcc scheduler does not handle VLIW scheduling very
well, and it needs a fair amount of target specific help.
I dont know the list of known requirements (help), but from my side, currently
insns are marked by TImode to signify the start of a VLIW bundle but some
assemblers may require to signify the end of a VLIW bundle. There is no
provision for that. Currently i have hacked GCC to meet this requirement.
