The architecture for which I generate code is Intel x86.
On 3/6/06, Rajkishore Barik <[EMAIL PROTECTED]> wrote:
> Hi,
>
> I was trying to feed the "reload" phase with a different hardware
> register assignment to pseudo registers (using reg_renumber array)
> than the ones produced by local-alloc or global-alloc. However, I get
> problems with the following instruction in post-reload.c:391 in
> "reload_cse_simplify_operands" function stating that the "insn does
> not satisfy constraint".
> Can someone please help me if the following instruction has any
> specific constraint requirement during register allocation phase?
>
> (insn:HI 100 99 102 8 (parallel [
> (set (reg:SI 108)
> (div:SI (reg:SI 75 [ prephitmp.6 ])
> (reg:SI 74 [ prephitmp.8 ])))
> (set (reg:SI 109)
> (mod:SI (reg:SI 75 [ prephitmp.6 ])
> (reg:SI 74 [ prephitmp.8 ])))
> (clobber (reg:CC 17 flags))
> ]) 196 {*divmodsi4_cltd} (insn_list:REG_DEP_TRUE 99 (nil))
> (expr_list:REG_UNUSED (reg:CC 17 flags)
> (expr_list:REG_UNUSED (reg:SI 109)
> (expr_list:REG_DEAD (reg:SI 74 [ prephitmp.8 ])
> (expr_list:REG_DEAD (reg:SI 75 [ prephitmp.6 ])
> (expr_list:REG_UNUSED (reg:CC 17 flags)
> (expr_list:REG_UNUSED (reg:SI 109)
> (nil))))))))
>
> regards,
> ~R
>
