On 13 April 2006 18:52, Rask Ingemann Lambertsen wrote:
> Consider the file xordi.c:
>
> signed long long int xordi (signed long long int a, signed long long int b)
> {
> return (a ^ b);
> }
> (insn 6 10 7 0 (set (reg/v:DI 59 [ a ])
> (mem/c/i:DI (reg/f:SI 16 argp) [2 a+0 S8 A32])) 56 {*movdi_2} (nil)
> (nil))
>
> (insn 7 6 8 0 (set (reg/v:DI 60 [ b ])
> (mem/c/i:DI (plus:SI (reg/f:SI 16 argp)
> (const_int 8 [0x8])) [2 b+0 S8 A32])) 56 {*movdi_2} (nil)
> (nil))
> (insn 14 8 12 0 (clobber (reg:DI 61)) -1 (nil)
> (insn_list:REG_LIBCALL 15 (nil)))
>
> (insn 12 14 13 0 (parallel [
> (set (subreg:SI (reg:DI 61) 0)
> (xor:SI (subreg:SI (reg/v:DI 59 [ a ]) 0)
> (subreg:SI (reg/v:DI 60 [ b ]) 0)))
> (clobber (reg:CC 17 flags))
> ]) 235 {*xorsi_1} (insn_list:REG_DEP_TRUE 6 (insn_list:REG_DEP_TRUE
> 7 (insn_list:REG_DEP_TRUE 14 (nil)))) (expr_list:REG_UNUSED (reg:CC 17
> flags) (expr_list:REG_NO_CONFLICT (reg/v:DI 59 [ a ])
> (expr_list:REG_NO_CONFLICT (reg/v:DI 60 [ b ])
> (nil)))))
>
> (insn 13 12 15 0 (parallel [
> (set (subreg:SI (reg:DI 61) 4)
> (xor:SI (subreg:SI (reg/v:DI 59 [ a ]) 4)
> (subreg:SI (reg/v:DI 60 [ b ]) 4)))
> (clobber (reg:CC 17 flags))
> ]) 235 {*xorsi_1} (insn_list:REG_DEP_TRUE 12 (nil))
> (expr_list:REG_DEAD (reg/v:DI 59 [ a ])
> (expr_list:REG_DEAD (reg/v:DI 60 [ b ])
> (expr_list:REG_UNUSED (reg:CC 17 flags)
> (expr_list:REG_NO_CONFLICT (reg/v:DI 59 [ a ])
> (expr_list:REG_NO_CONFLICT (reg/v:DI 60 [ b ])
> (nil)))))))
> I don't understand why insn 13 is supposed to have a dependency on insn 12.
> There is no overlap between the subregs. I would have thought that insn 13
> should have a dependency on insn 6, 7 and possibly 14, like insn 12.
>
> Am I simply misunderstanding the purpose of (undocumented) REG_DEP_TRUE?
I can't say either, since I don't know much about dependency tracking, but
one thing jumps out at me: insn 13 couldn't have all those REG_DEAD notes on
it unless it was /somehow/ guaranteed that insn 12 won't get scheduled after
it, because they kill the whole DImode register, which is to say both of the
SImode hard regs to which it gets allocated, and it would be bad if only half
of the move had been completed at that time!
So my guess is it's a design compromise because it's too tricky to track the
lives of the subreg parts of the DImode values independently.
cheers,
DaveK
--
Can't think of a witty .sigline today....
