Andrew MacLeod <[EMAIL PROTECTED]> writes: > On Fri, 2006-06-23 at 15:07 -0700, Ian Lance Taylor wrote: > > > You omitted the RTL loop optimizer passes, which still do quite a bit > > of work despite the tree-ssa loop passes. Also if-conversion and some > > minor passes, though they are less relevant. > > Which brings up a good discussion. I presume the rtl loop optimizers see > things exposed by addressing modes which aren't seen in the higher level > code. I wonder what the "big gains" are here... and if they are > detectable at expansion time...
One obvious gain is hoisting constants exposed by address expansion out of loops. Also once addressing modes are expanded, there are new IVs. > I am not proposing that CSE necessarily be eliminated *all* the time, > but in cases when register pressure is already excessively high, is > further commoning of DImode values going to make things better? Its > really this case I'm interested in evaluating since this is the case we > already have problems. if we don't spill, RABLET would effectively do > nothing. I think that even when pressure is high, it helps a lot to do CSE after DImode values have been split up, as will be the case even today for, e.g., DImode bitwise operations. It tends to reduce register pressure if anything. As you say, none of these arguments that RABLET is a bad idea, they are just arguments that we can't expect to remove the RTL passes without a lot more work, whether or not they increase register pressure. One thing we could perhaps consider would be expanding addressing mode calculations at the tree level. Ian