On Tue, Nov 07, 2006 at 11:36:00PM -0600, Peter Bergner wrote: > The parallel that is causing the ICE is a store with update RTL insn. > It seems like we should detect that and reach into the parallel and > grab the actual store insn. I'll look into adding that.
I'm testing the patch below. It finished bootstrapping fine, I just need to run the test suite now. Peter Index: rs6000.c =================================================================== --- rs6000.c (revision 118396) +++ rs6000.c (working copy) @@ -674,6 +674,7 @@ static bool is_cracked_insn (rtx); static bool is_branch_slot_insn (rtx); static bool is_load_insn (rtx); +static rtx get_store_dest (rtx pat); static bool is_store_insn (rtx); static bool set_to_load_agen (rtx,rtx); static bool adjacent_mem_locations (rtx,rtx); @@ -16952,9 +16953,9 @@ adjacent_mem_locations (rtx insn1, rtx insn2) { - rtx a = SET_DEST (PATTERN (insn1)); - rtx b = SET_DEST (PATTERN (insn2)); - + rtx a = get_store_dest (PATTERN (insn1)); + rtx b = get_store_dest (PATTERN (insn2)); + if ((GET_CODE (XEXP (a, 0)) == REG || (GET_CODE (XEXP (a, 0)) == PLUS && GET_CODE (XEXP (XEXP (a, 0), 1)) == CONST_INT)) @@ -17208,6 +17209,28 @@ return is_store_insn1 (PATTERN (insn)); } +/* Return the dest of a store insn. */ + +static rtx +get_store_dest (rtx pat) +{ + gcc_assert (is_store_insn1 (pat)); + + if (GET_CODE (pat) == SET) + return SET_DEST (pat); + else if (GET_CODE (pat) == PARALLEL) + { + int i; + + for (i = 0; i < XVECLEN (pat, 0); i++) + if (is_store_insn1 (XVECEXP (pat, 0, i))) + return XVECEXP (pat, 0, i); + } + /* We shouldn't get here, because we should have either a simple + store insn or a store with update which are covered above. */ + gcc_assert (0); +} + /* Returns whether the dependence between INSN and NEXT is considered costly by the given target. */