On 13 November 2006 12:27, Mohamed Shafi wrote:
> (insn 94 91 95 6 (set (reg:SI 12 a4)
> (mem/c:SI (reg:SI 12 a4) [0 D.1863+0 S4 A32])) 15 {movsi_load} (nil)
> (nil))
>
> (insn 95 94 31 6 (set (reg:SI 13 a5 [orig:12+4 ] [12])
> (mem/c:SI (plus:SI (reg:SI 12 a4)
> (const_int 4 [0x4])) [0 D.1863+4 S4 A32])) 15 {movsi_load}
> (nil) (nil))
> As you can see insns 90,91,94 and 95 are inserted in this pass, and
> the code goes wrong in insns 95/94
>
> Why are these insns inserted in between ?
It is a bug. Reload is not too clever when it comes to synthesizing DI
sized instructions from SI sized insns. Here, it is trying to reload a DI
sized variable into registers from a stack slot (I'm guessing r14 is your SP,
yes?). It is trying to implement (set (reg:DI 12) (mem:DI (reg:SI 12))).
This would be fine if reload understood that in DImode, r12 includes r13, or
if it thought that the input operand had to be an earlyclobber, in which case
it could not allocate an overlapping range or it could re-order the loads.
But it doesn't, and it gets it wrong.
> With only subdi3 and adddi3 pattern available in the md file, and no
> other define_split or define_insns or define_expand for DI mode, how
> can i control the instructions generated due to reload?
You *must* implement a movdi expander, and it has to be clever enough to
notice when one of the output registers is going to clobber one of the input
operands and emit the two SImode halves of the move in the opposite order.
cheers,
DaveK
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