You'll want to have a look at something like the SSE SIMD optimisation within the back end for the x86. I'd also download the GCC internals document for 4.3.x as it has some information on CPU SIMD optimisations.
I've been reviewing this area heavily as I'm combining GCC and GPGPU (the same idea behind Stanford Uni's folding at home GPU client). Looks like I'll have to target the tree before the SIMD vectorisation optimisation area. If anyone's interested - I'm looking to put this all in a white paper and posting up on gpgpu.org forums. > -------Original Message------- > From: sdutta <[EMAIL PROTECTED]> > Subject: Auto Vectorizing help needed > Sent: 24 Feb '07 00:13 > > I am targeting GCC 4.1.1 to a custom RISC processor; which has some vector > instructions (32 bit vectors). It can perform two 16 bit/ or four 8 bit > additions, subtractions, multiplications & shift operations simultaneously. > > I would like to use the Auto-Vectorizing capability to generate these > instructions. Is there an existing backend that I could look at for > something similar? Any help will be greatly appreciated. > > SD > >
