"H. J. Lu" <[EMAIL PROTECTED]> wrote on 20/04/2007 18:02:09:
> Hi Dorit,
>
> SSE4 has vector zero/sign-extensions like:
>
> (define_insn "sse4_1_zero_extendv2siv2di2"
> [(set (match_operand:V2DI 0 "register_operand" "=x")
> (zero_extend:V2DI
> (vec_select:V2SI
> (match_operand:V4SI 1 "nonimmediate_operand" "xm")
> (parallel [(const_int 0)
> (const_int 1)]))))]
> "TARGET_SSE4_1"
> "pmovzxdq\t{%1, %0|%0, %1}"
> [(set_attr "type" "ssemov")
> (set_attr "mode" "TI")])
>
> Does vectorizer support them?
>
(sorry, I was away from email during Friday-Saturday) -
so this looks like a vec_unpacku_hi_v4si (or _lo?), i.e. what is now
modeled as follows in sse.md:
(define_expand "vec_unpacku_hi_v4si"
[(match_operand:V2DI 0 "register_operand" "")
(match_operand:V4SI 1 "register_operand" "")]
"TARGET_SSE2"
{
ix86_expand_sse_unpack (operands, true, true);
DONE;
})
grep for vec_pack/vec_unpack in genopinit.c (or better yet - in sse.md...)
dorit
> Thanks.
>
>
> H.J.
