On 23/09/11 08:21, Joern Rennecke wrote:
Quoting "Paulo J. Matos" <pa...@matos-sorge.com>:
My addition instruction sets all the flags. So I have:
This is annoying, but can be handled. Been there, done that.
dse.c needs a small patch, which I intend to submit sometime in the future.
Ok. Actually I was quite happy with my solution too which avoided having
to change the core. However, it was not heavily tested.
And all my (define_insn "*mov..." are tagged with a (clobber (reg:CC
RCC)). This generates all kinds of trouble since GCC generates moves
internally without the clobber that fail to match.
I don't think that can be overcome without cc0. Unless you want to
hide your flags register altogether.
That's seriously annoying. The idea was to ditch cc0 and explicitly
represent CC in a register to perform optimizations like splitting add
and addc for a double word addition. If by hiding my register flags
means going back to cc0, then it seems that the only way to go unless I
get it to work somehow. If you having anything else in mind to get it to
work let me know.
What I currently have in mind is to have a backend macro listing all the
move for which a move clobber CC_REG, then whenever GCC generates a
move, it queries the macro to know if the move requires clobbering and
emits the clobber if required. However, I am unsure how deep the rabbit
hole goes.
--
PMatos
