Dear All,
I'm looking up the below problem in our private backend.
During the RTL expansion the below rtl has been emitted..
(insn 6 5 7 (set (reg:SI 23)
(const_int 10 [0xa])) algt_001.c:41 -1
(nil))
(insn 7 6 8 (set (reg:SI 24)
(unspec:SI [
(mem/c/i:SI (symbol_ref:SI ("lsucCnt2.1746") [flags 0x2] [2 lsucCnt2+0 S4 A16])
] 1)) algt_001.c:41 -1
(nil))
(insn 8 7 0 (set (mem:SI (plus:SI (reg:SI 24)
(const_int 0 [0])) [0 S4 A16])
(reg:SI 23)) algt_001.c:41 -1
(nil))
With the optimisation (-O3) enabled ,the above rtl has been transformed to
(insn 7 6 8 2 (set (reg:SI 24)
(unspec:SI [
(mem/c/i:SI (symbol_ref:SI ("lsucCnt2.1746") [flags 0x2] ) [2
lsucCnt2+0 S4 A16])
] 1)) algt_001.c:41 59 {tx03_movw}
(nil))
(insn 8 7 0 2 (set (mem:SI (reg:SI 24) [0 S4 A16])
(const_int 10 [0xa])) algt_001.c:41 42 {storesi}
(expr_list:REG_DEAD (reg:SI 24)
(nil)))
Where insn-6 has been deleted and constant 10 is propagated to insn 8
an d finally ended emitting instruction like str 10 ,[mem] ,which is
invalid syntax for store where constant is not allowed.
I'm trying to handle the above problem ,by introducing scratch
register in the store template and peephole/split it ,where force the
constant to the scratch register. Before I do the same.
Would like to know the proposed solution is do able or there exist any
feasible solution out there ???
Looking for some suggestions here
Thanks
~Umesh
