On Oct 9, 2013, at 5:24 AM, Umesh Kalappa <[email protected]> wrote:
> Dear Group ,
>
> We are re-targeting the GCC to the CISC target ,which has the eight
> 8-bit registers and same register set can used as pair register for
> 16 bit computation i.e four 16-bits .
>
> Any one in the group tell me ,How do i model this requirement using
> the target macros like
>
> REG_CLASS_NAMES and REG_CLASS_CONTENTS etc.
>
>
> Thanks
> ~Umesh
There probably are other examples, but one you could look at is pdp11, which
has 16 bit registers that also can be used in even/odd pairs for 32 bit
operations.
paul
