Hello, I am looking into how rs6000 implements load multiple code and I understand everything except how rs6000 ensures that the register allocator allocates all the registers in *ldmsi<n> to consecutive registers.
At expand load_multiple generates these ldmsi<n> so I would expect that when they get to the register allocator, the pseudo registers can be allocated to non-consecutive registers and the pattern would fail to match what was originally intended. However the rs6000_output_load_multiple seems to ignore that fact and proceed to output lwz instructions happily nonetheless, so I am definitely missing something. Can someone please clarify? Paulo Matos
