FX MOREL <fxmorel....@gmail.com> writes: > Hi everyone, > > I am developing on a custom design using the LatticeMico32 > architecture and I use gcc 4.5.1 to compile C code for this arch. > > In this architecture, the loading of an address 0xHHHHLLLL always > takes two assembly instructions to fetch the address because > immediates are on 16 bits : > mvhi r1, 0xHHHH > ori r1, r1, 0xLLLL > ... > lw r2, r1 > > In my situation, nearly all the symbols are located in the same 64kB > region and their address share the same hi-part, so I am trying to > minimize the overload of always using two instructions when only one > is needed. >
[additional details deleted] > Because the symbol mapping phase is done during linking, I have little > chance to know the future symbol address at code generation but is > there some way I could make this work ? > If I affect the symbol to a dedicated section (with the __attribute__ > ((section())) directive ), is there a way to know its section during > code generation ? > > I understand that I am asking for a very 'dangerous' advice but again, > this will only be a custom optimization for a custom design. Have you considered doing this through custom GNU linker relaxation work? I would try this before hacking away at the compiler. AG > > Thank you. > > F-X Morel
