Has anyone any advice about the use of data synchronization
barriers when calling SWIs from C code compiled with GCC?
To give RiscLua a command 'sys' analogous to BASIC's SYS
command I use this code
asm volatile(
"stmfd sp!, {r4-r8,r12}" "\n\t"
"orr r12,%1,#0x20000 @ X-bit" "\n\t"
"mov r8,%2 @ register buffer" "\n\t"
"ldmia r8,{r0-r7}" "\n\t"
"swi 0x71 @ OS_CALLASWIR12" "\n\t"
"stmvcia r8,{r0-r7}" "\n\t"
"movvc r0,#0 @ 0 for success" "\n\t"
"ldmfd sp!,{r4-r8,r12}" "\n\t"
: "=r" (p): "r" (L),"r" (swinum), "r" (r) : "memory" );
entered with the SWI number in R1 and R2 pointing to a
buffer from which to load registers R0-R7 before entry,
and to which to save them on exit. I never thought much
about data synchronization, and when I compiled with
the Norcroft C compiler and Objasm it all worked fine
without.
Now I am using GCC and it does not seem to work.
I tried inserting a DSB instruction before SWI &71, but GCC
complained that this instruction was not available in ARM mode.
But it is not clear to me whether it is needed, seeing that
the code has worked fine in the past. I have used
'asm volatile' to assemble the code, but I am not sure whether
this is sufficient to stop GCC from optimizing it.
--
Gavin Wraith (ga...@wra1th.plus.com)
Home page: http://www.wra1th.plus.com/
_______________________________________________
GCCSDK mailing list gcc@gccsdk.riscos.info
Bugzilla: http://www.riscos.info/bugzilla/index.cgi
List Info: http://www.riscos.info/mailman/listinfo/gcc
Main Page: http://www.riscos.info/index.php/GCCSDK
