https://gcc.gnu.org/g:b700707a77eeaa1d37f733c4b2d2e242063c29d2

commit r17-1459-gb700707a77eeaa1d37f733c4b2d2e242063c29d2
Author: GCC Administrator <[email protected]>
Date:   Wed Jun 10 00:16:30 2026 +0000

    Daily bump.

Diff:
---
 gcc/ChangeLog           |  95 +++++++++++++++++++++++++++++++++++++++++++
 gcc/DATESTAMP           |   2 +-
 gcc/ada/ChangeLog       |   6 +++
 gcc/cobol/ChangeLog     |  65 ++++++++++++++++++++++++++++++
 gcc/cp/ChangeLog        |  16 ++++++++
 gcc/fortran/ChangeLog   |   4 ++
 gcc/jit/ChangeLog       |   5 +++
 gcc/testsuite/ChangeLog | 104 ++++++++++++++++++++++++++++++++++++++++++++++++
 libgcc/ChangeLog        |  13 ++++++
 libgcobol/ChangeLog     |   5 +++
 10 files changed, 314 insertions(+), 1 deletion(-)

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index a942d2eeab98..359508e128c8 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,98 @@
+2026-06-09  Georg-Johann Lay  <[email protected]>
+
+       * config/avr/avr.cc: Fix typos in comments.
+       * config/avr/avr-c.cc: Same.
+       * config/avr/avr-passes.cc: Same.
+       * config/avr/avr-passes-fuse-move.h: Same.
+
+2026-06-09  Uros Bizjak  <[email protected]>
+
+       PR target/125636
+       * config/i386/i386.md (extendqihi2): Use movsbl instead of movsbw.
+       Adjust the destination operand to use %k0 and update the mode
+       attribute accordingly.
+
+2026-06-09  Ciprian Arbone  <[email protected]>
+           Senthil Kumar Selvaraj  <[email protected]>
+
+       PR target/124077
+       * config/arm/arm.cc (thumb1_final_prescan_insn): Also skip
+       condition code update for thumb1_cbz instructions.
+       * config/arm/thumb1.md (thumb1_cbz): Use const0_rtx as the
+       recorded cc_op1 instead of operands[2].
+
+2026-06-09  Lino Hsing-Yu Peng  <[email protected]>
+
+       * config/riscv/riscv-protos.h (enum altfmt_type): New.
+       * config/riscv/riscv-v.cc (emit_hard_vlmax_vsetvl): Pass
+       ALTFMT_NONE to gen_vsetvl.
+       (gen_no_side_effects_vsetvl_rtx): Pass ALTFMT_NONE to
+       gen_vsetvl_no_side_effects.
+       * config/riscv/riscv-vector-builtins-bases.cc: Include insn-attr.h.
+       (vsetvl::expand): Pass ALTFMT_NONE to gen_vsetvl_no_side_effects.
+       * config/riscv/riscv-vsetvl.cc (altfmt_to_str): New function.
+       (get_altfmt): New function.
+       (demand_flags): Add DEMAND_ALTFMT_P.
+       (altfmt_demand_type): New enum.
+       (vsetvl_info): Track altfmt.
+       (demand_system): Add altfmt compatibility, availability, and merge 
handling.
+       * config/riscv/riscv-vsetvl.def: Add altfmt rules.
+       * config/riscv/vector.md (altfmt): New attribute, numeric with
+       INVALID_ATTRIBUTE default.
+       (@vsetvl<mode>, vsetvl_vtype_change_only,
+       @vsetvl_discard_result<mode>, @vsetvl<mode>_no_side_effects,
+       *vsetvldi_no_side_effects_si_extend): Add altfmt operand.
+
+2026-06-09  Georg-Johann Lay  <[email protected]>
+
+       * config/avr/avr.md: Fix typos in comments.
+       * config/avr/avr-fixed.md: Same.
+       * config/avr/avr-passes.cc: Same
+       * config/avr/avr-passes-fuse-move.h: Same.
+
+2026-06-09  Wilco Dijkstra  <[email protected]>
+
+       * config/aarch64/aarch64-sve.md: Remove zeroing movprfx of merging MOV
+
+2026-06-09  Artemiy Volkov  <[email protected]>
+
+       PR target/125550
+       * config/aarch64/aarch64-simd.md
+       (*aarch64_combine_internal<mode>): Use zip1 instead of uzp1
+       to concatenate values residing in SIMD registers.
+       (*aarch64_combine_internal_be<mode>): Likewise.
+
+2026-06-09  JRobinNTA  <[email protected]>
+
+       PR target/125395
+       * config/riscv/thead.cc (th_asm_output_opcode): Add VFCVT
+       and VFWCVT blocks. Add offset logic for static rounding suffixes.
+
+2026-06-09  Alex Coplan  <[email protected]>
+
+       PR middle-end/125621
+       * expmed.cc (make_tree): Fix CONST_POLY_INT case to pass type
+       instead of t, move it to its own switch case.
+
+2026-06-09  Monk Chiang  <[email protected]>
+            "Jim Wilson  <[email protected]>
+
+       * config/riscv/riscv-protos.h (riscv_zero_offset_address_bypass_p):
+       New function.
+       * config/riscv/riscv.cc (riscv_zero_offset_address_bypass_p): New
+       function.
+       * config/riscv/sifive-7.md: Add bypass definition.
+
+2026-06-09  Monk Chiang  <[email protected]>
+
+       * config/riscv/riscv.cc (riscv_trampoline_init): Remove redundant
+       LUI instruction.
+
+2026-06-09  Martin Jambor  <[email protected]>
+
+       * config/pdp11/pdp11.cc (pdp11_conditional_register_usage): Change i
+       from int to unsigned int.
+
 2026-06-09  Xi Ruoyao  <[email protected]>
 
        PR rtl-optimization/125609
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index eed21ff12b80..06405ca1d832 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20260609
+20260610
diff --git a/gcc/ada/ChangeLog b/gcc/ada/ChangeLog
index 48651e3cdd65..71b5dbdcf548 100644
--- a/gcc/ada/ChangeLog
+++ b/gcc/ada/ChangeLog
@@ -1,3 +1,9 @@
+2026-06-09  Eric Botcazou  <[email protected]>
+
+       PR ada/125695
+       * libgnat/s-genbig.adb ("**"): Do not drop the sign on the floor.
+       (Big_Exp): Take into account the parity of the exponent for -2.
+
 2026-06-05  Eric Botcazou  <[email protected]>
 
        * sem_ch3.adb (Analyze_Private_Extension_Declaration): Revert latest
diff --git a/gcc/cobol/ChangeLog b/gcc/cobol/ChangeLog
index d038b5cc26da..c2e9be8aa50b 100644
--- a/gcc/cobol/ChangeLog
+++ b/gcc/cobol/ChangeLog
@@ -1,3 +1,68 @@
+2026-06-09  Robert Dubner  <[email protected]>
+
+       * Make-lang.in: Incorporate new move.cc file.
+       * genapi.cc (gg_attribute_bit_get): Removed.
+       (treeplet_fill_source): Moved.
+       (file_static_variable): Likewise.
+       (move_helper): Likewise.
+       (parser_initialize_programs): Use pointer without converting to
+       size_t.
+       (get_binary_value_from_float): Moved.
+       (gg_attribute_bit_clear): Removed.
+       (gg_attribute_bit_set): Removed.
+       (digits_to_bytes): Moved.
+       (get_bytes_needed): Moved.
+       (data_decl_type_for): Moved.
+       (parser_display_internal): Forward reference to move_helper.
+       (get_literalN_value): Moved.
+       (is_figconst_t): Moved.
+       (parser_initialize_table): Moved.
+       (is_figconst): Moved.
+       (parser_move): Moved.
+       (parser_move_multi): Moved.
+       (parser_division): Use function_address as pointer in call to
+       __gg__is_canceled.
+       (conditional_abs): Moved.
+       (get_reference_to_data): Moved.
+       (mh_identical): Moved.
+       (mh_source_is_literalN): Moved.
+       (float_type_of): Moved.
+       (mh_dest_is_float): Moved.
+       (picky_memset): Moved.
+       (picky_memcpy): Moved.
+       (mh_numeric_display): Moved.
+       (mh_little_endian): Moved.
+       (mh_source_is_group): Moved.
+       (mh_source_is_literalA): Moved.
+       (have_common_parent): Moved.
+       (mh_alpha_to_alpha): Moved.
+       * genapi.h (move_helper): New declaration.
+       * gengen.cc (gg_cast): Changes to someday detect aliasing
+       conditions.
+       (gg_show_type): Expand types.
+       (gg_indirect_i): Take a size_t parameter.
+       (gg_array_value): Use gg_cast() wrapper instead of fold_convert().
+       (gg_memchr): Likewise.
+       (gg_strcmp): Likewise.
+       (gg_strncmp): Likewise.
+       (gg_strlen): Likewise.
+       (gg_strdup): Likewise.
+       (gg_malloc): Likewise.
+       (gg_realloc): Moved.
+       * gengen.h (gg_indirect_i): New declaration.
+       * genutil.cc (get_location): Starting to look for aliasing.
+       (treeplet_fill_source): Moved.
+       (data_decl_type_for): Moved.
+       (attribute_bit_clear): Moved.
+       (attribute_bit_get): Moved.
+       (attribute_bit_set): Moved.
+       * genutil.h (treeplet_fill_source): New declaration.
+       (data_decl_type_for): Likewise.
+       (attribute_bit_clear): Likewise.
+       (attribute_bit_get): Likewise.
+       (attribute_bit_set): Likewise.
+       * move.cc: New file.
+
 2026-06-05  Robert Dubner  <[email protected]>
 
        PR cobol/125616
diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog
index 5457cc8d594b..438f40bbb29d 100644
--- a/gcc/cp/ChangeLog
+++ b/gcc/cp/ChangeLog
@@ -1,3 +1,19 @@
+2026-06-09  Marek Polacek  <[email protected]>
+
+       PR c++/121287
+       PR c++/125212
+       PR c++/105667
+       PR c++/121597
+       PR c++/110961
+       * cp-tree.h (TYPE_DECL_OPAQUE_ALIAS_P): Define.
+       (any_lambdas_p): Declare.
+       * decl.cc (grokdeclarator): Set TYPE_DECL_OPAQUE_ALIAS_P.
+       * pt.cc (dependent_opaque_alias_p): Refine to check
+       TYPE_DECL_OPAQUE_ALIAS_P.
+       (tsubst_decl) <case TYPE_DECL>: Set TYPE_DECL_OPAQUE_ALIAS_P.
+       (any_lambdas_p): New, factored out of...
+       (regenerate_decl_from_template): ...this.  Call it.
+
 2026-06-08  Jakub Jelinek  <[email protected]>
 
        * call.cc (build_op_delete_call_1): Add missing auto_diagnostic_group
diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog
index 71be30d59e16..e0cea77ce3fb 100644
--- a/gcc/fortran/ChangeLog
+++ b/gcc/fortran/ChangeLog
@@ -1,3 +1,7 @@
+2026-06-09  Tobias Burnus  <[email protected]>
+
+       * module.cc (load_omp_udrs): Improve reduction diagnostic output.
+
 2026-06-09  Paul Thomas  <[email protected]>
 
        PR fortran/125669
diff --git a/gcc/jit/ChangeLog b/gcc/jit/ChangeLog
index 802955bc32b5..775ff0ec09f4 100644
--- a/gcc/jit/ChangeLog
+++ b/gcc/jit/ChangeLog
@@ -1,3 +1,8 @@
+2026-06-09  Antoni Boucher  <[email protected]>
+
+       * libgccjit.cc: Allow cast between integers and pointers in
+       is_valid_cast.
+
 2026-05-30  Dhruv Chawla  <[email protected]>
 
        * TODO.rst: Fix typos.
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index bb7d59977cd5..c6c4573162c3 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,107 @@
+2026-06-09  Robert Dubner  <[email protected]>
+
+       * cobol.dg/group2/COMP-3_to_COMP-3__IN-PHASE__MOVES.cob: New test.
+       * cobol.dg/group2/COMP-3_to_COMP-3__IN-PHASE__MOVES.out: New test.
+       * cobol.dg/group2/COMP-3_to_COMP-3__OUT-OF-PHASE__MOVES.cob: New test.
+       * cobol.dg/group2/COMP-3_to_COMP-3__OUT-OF-PHASE__MOVES.out: New test.
+
+2026-06-09  Eric Botcazou  <[email protected]>
+
+       * gnat.dg/bigint1.adb: New  test.
+
+2026-06-09  Marek Polacek  <[email protected]>
+
+       PR c++/121287
+       PR c++/125212
+       PR c++/105667
+       PR c++/121597
+       PR c++/110961
+       * g++.dg/cpp26/lambda-targ1.C: New test.
+       * g++.dg/cpp2a/lambda-targ26.C: New test.
+       * g++.dg/cpp2a/lambda-targ27.C: New test.
+       * g++.dg/cpp2a/lambda-targ28.C: New test.
+       * g++.dg/cpp2a/lambda-targ29.C: New test.
+       * g++.dg/cpp2a/lambda-targ30.C: New test.
+       * g++.dg/cpp2a/lambda-targ31.C: New test.
+       * g++.dg/cpp2a/lambda-targ32.C: New test.
+
+2026-06-09  Uros Bizjak  <[email protected]>
+
+       PR target/125636
+       * gcc.target/i386/pr89954.c: Update assembler scan
+       directives to expect movsbl instead of movsbw.
+
+2026-06-09  Ciprian Arbone  <[email protected]>
+           Senthil Kumar Selvaraj  <[email protected]>
+
+       PR target/124077
+       * gcc.target/arm/pr124077.c: New test.
+
+2026-06-09  Antoni Boucher  <[email protected]>
+
+       * jit.dg/test-cast.c: Add test case for pointer to int cast.
+
+2026-06-09  Wilco Dijkstra  <[email protected]>
+
+       * gcc.target/aarch64/sve/acle/asm/dup_bf16.c: Update.
+       * gcc.target/aarch64/sve/acle/asm/dup_f16.c: Update.
+       * gcc.target/aarch64/sve/acle/asm/dup_f32.c: Update.
+       * gcc.target/aarch64/sve/acle/asm/dup_f64.c: Update.
+       * gcc.target/aarch64/sve/acle/asm/dup_s16.c: Update.
+       * gcc.target/aarch64/sve/acle/asm/dup_s32.c: Update.
+       * gcc.target/aarch64/sve/acle/asm/dup_s64.c: Update.
+       * gcc.target/aarch64/sve/acle/asm/dup_s8.c: Update.
+       * gcc.target/aarch64/sve/acle/asm/dup_u16.c: Update.
+       * gcc.target/aarch64/sve/acle/asm/dup_u32.c: Update.
+       * gcc.target/aarch64/sve/acle/asm/dup_u64.c: Update.
+       * gcc.target/aarch64/sve/acle/asm/dup_u8.c: Update.
+       * gcc.target/aarch64/sve/acle/asm/mul_s16.c: Update.
+       * gcc.target/aarch64/sve/acle/asm/mul_s32.c: Update.
+       * gcc.target/aarch64/sve/acle/asm/mul_s64.c: Update.
+       * gcc.target/aarch64/sve/acle/asm/mul_s8.c: Update.
+       * gcc.target/aarch64/sve/acle/asm/mul_u16.c: Update.
+       * gcc.target/aarch64/sve/acle/asm/mul_u32.c: Update.
+       * gcc.target/aarch64/sve/acle/asm/mul_u64.c: Update.
+       * gcc.target/aarch64/sve/acle/asm/mul_u8.c: Update.
+       * gcc.target/aarch64/sve/vcond_18.c: Update.
+       * g++.target/aarch64/sve/dup_sel_5.C: Update.
+       * g++.target/aarch64/sve/dup_sel_6.C: Update.
+
+2026-06-09  Artemiy Volkov  <[email protected]>
+
+       PR target/125550
+       * gcc.target/aarch64/ldp_stp_16.c: Adjust testcases.
+       * gcc.target/aarch64/pr109072_1.c: Likewise.
+       * gcc.target/aarch64/simd/mf8_data_1.c: Likewise.
+       * gcc.target/aarch64/sve/vec_init_5.c: Likewise.
+       * gcc.target/aarch64/vec-init-14.c: Likewise.
+       * gcc.target/aarch64/vec-init-23.c: Likewise.
+       * gcc.target/aarch64/vec-init-9.c: Likewise.
+       * gcc.target/aarch64/sve/pr125550.c: New test.
+
+2026-06-09  JRobinNTA  <[email protected]>
+
+       PR target/125395
+       * gcc.target/riscv/rvv/xtheadvector/pr125395.c: New test.
+
+2026-06-09  Alex Coplan  <[email protected]>
+
+       PR middle-end/125621
+       * gcc.target/aarch64/torture/pr125621.c: New test.
+
+2026-06-09  Monk Chiang  <[email protected]>
+            "Jim Wilson  <[email protected]>
+
+       * gcc.target/riscv/sifive-7-load-address-bypass.c: New test.
+
+2026-06-09  Monk Chiang  <[email protected]>
+
+       * gcc.target/riscv/zicfilp-trampoline.c: New test.
+
+2026-06-09  Tobias Burnus  <[email protected]>
+
+       * gfortran.dg/gomp/declare-reduction-1.f90: New test.
+
 2026-06-09  Paul Thomas  <[email protected]>
 
        PR fortran/125669
diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog
index 73830ec34faa..3380feae6db1 100644
--- a/libgcc/ChangeLog
+++ b/libgcc/ChangeLog
@@ -1,3 +1,16 @@
+2026-06-09  Georg-Johann Lay  <[email protected]>
+
+       * config/avr/lib1funcs.S: Fix trailing blanks.
+       (mov_h): Remove macro and invocations.
+       (mov_l): Remove macro.  Replace invocations with wmov.
+       (__zero_reg__, __tmp_reg__, __SREG__, __SP_H__)
+       (__SP_L__, __RAMPZ__, __EIND__, skip, NEG2, NEG4)
+       (wmov, wsubi, waddi, mov4, XCALL, XJMP, XICALL, XIJMP)
+       (do_prologue_saves, do_epilogue_restores, .branch_plus)
+       (DEFUN, ENDF, FALIAS): Move macros to...
+       * config/avr/asm-defs.h: ...this new file.
+       * config/avr/lib1funcs-fixed.S: Fix trailing blanks.
+
 2026-06-01  Dhruv Chawla  <[email protected]>
 
        * config/s390/tpf-unwind.h (s390_fallback_frame_state): Likewise.
diff --git a/libgcobol/ChangeLog b/libgcobol/ChangeLog
index c2d1b3cab35a..17e364c6a215 100644
--- a/libgcobol/ChangeLog
+++ b/libgcobol/ChangeLog
@@ -1,3 +1,8 @@
+2026-06-09  Robert Dubner  <[email protected]>
+
+       * libgcobol.cc (__gg__to_be_canceled): Use pointer instead of size_t.
+       (__gg__is_canceled): Likewise.
+
 2026-06-05  Robert Dubner  <[email protected]>
 
        PR cobol/125616

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