On 12 August 2014 21:37, Camm Maguire <[email protected]> wrote: > Greetings! > > Will Newton <[email protected]> writes: > >> On 12 August 2014 20:28, Camm Maguire <[email protected]> wrote: >> >> custreloc is working, but lacks trampolines. The branch distance is >> +/-128MB which seems sufficient on the cygwin branch but not master >> where the heap seems to grow much more quickly. >> > > Great! I did not know this (apparent adequacy on cygwin). As I recall, > there is still no long-calls option. Can you post the relocs used by > the existing calls output by gcc? Is the branch you mention above the > existing 24bit call?
The relocs used by gcc should be covered in the patch I posted, the relative branch is R_AARCH64_CALL26/R_AARCH64_JUMP26. The relocations are documented on the ARM website (not sure if you need an account): http://infocenter.arm.com/help/topic/com.arm.doc.ihi0056b/IHI0056B_aaelf64.pdf > I'm surprised there is a difference between master and 2.6.11pre here, > but the immediate goal is the latter. The most strenuous test will be > the acl2 build, and I'd be very surprised if that will work with 24bit > calls even in 2.6.11pre. If it does, we can proceed with the release. > >> >> I think debian-arm is a good place to ask, there should be some ARM >> and Linaro people on that list who may be able to arrange access to >> hardware. > > Thanks so much. Have posted there, and already received a kind offer. Excellent! > I take it you are working on/with gcc development on arm64. How long > will it take to get long-calls? I can't speak for ARM but I don't believe they plan to add a long calls option to the compiler as the linker is capable of dealing with adding the required trampolines. > Lastly, is there any reason why a 32bit long call on arm32 could not be > used as a arm64 trampoline? Is the instruction encoding the same? The ISA is completely new, although it does have a number of similarities to AArch32 (as it is now known). The sequence to use would probably be something like: adrp ip0, #:pg_hi21:sym add ip0, #:lo12:sym br ip0 Which gives 32bits pc-relative. -- Will Newton Toolchain Working Group, Linaro _______________________________________________ Gcl-devel mailing list [email protected] https://lists.gnu.org/mailman/listinfo/gcl-devel
