On Sun, 2008-10-12 at 12:38 -0400, der Mouse wrote: > >> If you're willing to assume you're using gcc, > > We're not. > > That's what I'd expect - but the message I was responding to seemed to > be entirely predicated upon that, talking about what gcc did and didn't > do as though that should control gEDA's design. I was basically saying > "well, based on the assumptions you seem to be making, the whole issue > is academic because there's a much better way in that case".
My fault for the misunderstanding, and I wouldn't suggest for a minute that PCB / gEDA should become gcc only. I am interested in your examples though.. I'm was simply looking to understand what limits the optimisation of the compiler I'm using with PCB, to see it would make a good job at optimising the code. I was looking to see if there were any bottle-necks I could fix. For example, with some macros defined to pick out the syntax understood by any specific compilers, we could add branch prediction information to certain hot-spot routines. True, any significant speed-ups will come from algorithmic tweaks, not compiler optimisation, compiling with -O0 vs -O3 does make several seconds difference to the 20-30 second boot time my local development version of PCB (*) when it loads my test design. * (Modified to do full polygon pours and island removal) -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) _______________________________________________ geda-dev mailing list [email protected] http://www.seul.org/cgi-bin/mailman/listinfo/geda-dev
