Carlos Nieves Ónega wrote:
El sáb, 10-12-2005 a las 11:37 -0500, Dan McMahill escribió:

I've been thinking about issues around cross probing (select a component or net in the schematic and have it select the component or net in pcb) and plotting simulation results (select a net and hit plot) in gschem. It seems one of the issues to solve is that the nets which are not explicitly named do not get a name until netlist time. This means gschem doesn't know the names of these nets and therefore can't really plot node voltages or tell pcb to select/hilight a net.

Anyone have any thoughts about how this could be addressed? At least one commercial tool has a 'check and save' button/menu choice/hotkey which extracts connectivity for the schematic and assigns net names to all nets which haven't been explicitly named. When you netlist (for layout or simulation), these net names are used.


IIRC, the netnames could change if you use one backend or another, due
to netname restrictions in some programs...

This is certainly true that there are netname restrictions. In fact the place where that mapping is done (and the only place it is known) is in the specific gnetlist backends. It may not be the best way, but some commercial tools deal with this by creating a database file at netlist time which maps schematic names (node names, pin names for currents, instance names, etc) to simulator names. It would not be hard at all to dump out this database because as part of the netname modifications, a database is already created to detect netname collisions due to target netlist name limitations.

It may be not the best way, but a workaround for this could be the
following:
- Click on any net in gschem.
- Get the components and its pins connected to that net. For example:
pin 2 of R1, pin 3 of R2.

Does this capability exist within gschem already or is that part really just a part of gnetlist?

- Tell pcb or whatever app to select the net connected to pin 2 of R1
and/or pin 3 of R2.
This way you handle nets as they are: a connection between pins of
components, and you are not tied to any name (it can change when you
netlist the schematic).

For pcb this doesn't sound bad, especially in light of DJ's reply to my mail (that he had just added this to the hid sources). I'm not sure how well this may work with simulators. I suppose since we have to create a netlist anyway for simulation, that a database of sorts could be constructed at the same time.

-Dan

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