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I've been working on an SDRAM controller with Wishbone interface. This is a full-featured, configurable (at compile time and run time) controller that, theoretically, manages all the SDRAM bursting so that Wishbone accesses are translated to reasonably efficient SDRAM transactions. <ftp://ftp2.picturel.com/pub/eda/sdram_wb/sdram_wb-20060315.tgz> I'm working on putting this into a real board (day-job) and I have done some post-synthesis simulations, so it should work. I haven't stored real electrons yet, though. This core is also available via anonymous CVS on the icarus.com CVS server, if anyone is interested. The license is GPL currently, but I'm willing to entertain more hardware/FPGA friendly open-source licenses. - -- Steve Williams "The woods are lovely, dark and deep. steve at icarus.com But I have promises to keep, http://www.icarus.com and lines to code before I sleep, http://www.picturel.com And lines to code before I sleep." -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.2.5 (GNU/Linux) Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org iD8DBQFEGNDArPt1Sc2b3ikRAlHKAJ98TR2iTKWHsXRUke9aKtKZdf8q4ACgsDTC qvubTV0IH1jKIT8oLvbvzJc= =tMbE -----END PGP SIGNATURE-----
