I spent the past few month becoming familiar with PCB and after finishing my schematic in gschem I'm ready to start the layout. Hooray! I've got a fairly good handle on the basics but there are few areas that I need a little assistance/guidance. The first is getting polygons and lines to play nicely together. My plan is to try and get my design on a 2 layer board. I've spent a lot of time arranging components to make routing as painless as possible. If I can get away with 2 layers I want a GND plane on the bottom layer which will be split up by traces that just couldn't fit on the components side of the board. So I did some practicing and drew a line for on the solder side of the board. Afterwards I drew a large rectangle(polygon) on the solder side when I had GND_SLDR chosen . I then figured out that <key>j enforced the clearances around the line and nicely removed the GND polygon from the trace.
Problems/Questions: 1. Even after the polygon was cleared from the trace the rat's nest was claiming that the net associated with the trace on solder side was shorting with GND??? I remove the trace and the error goes away...if I leave the trace and remvoe the GND plane the error goes away. How do I figure out what is wrong when visually the GND polygon is clearing the net? 2. Should I draw the GND plane at the beginning or should it be the last step? 3. I have unplated holes on one of my symbols that is enforcing a clearance on the component side but not on the Solder side. After I drew polygon associated with GND_SLDER I get warnings about a polygon to close to the holes. Why is there not a clearance on the Solder side of the board enforced for nonplated holes? How do I get this clearance around the holes to work? 4. Layer assignments. I understand that PCB goes up to 8 layers. In the preferences there is up to 8 groups and 8 different buttons two of which are unassigned by default. If I changed my design to a 4 layer design with the following configuration: Bottom (Layer 4): Signal and components Middle (Layer 3): GND Middle (Layer 2): VCC: 3.3, 5, and 12 Top (Layer 1): Signal and components How would I configure the groups and Y axis buttons in PCB layer preferences to acheive the results above? I saw in the info tab an example but I don't think it's exactly what I'm after. Any assitance is greatly appreciated. Thanks Jeff _______________________________________________ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user