On Sat, 2008-02-02 at 16:52 -0900, Britton Kerin wrote: > I have a design with two subcircuits. I pretty much copied the gTAG > example but I missed the trick of making a netname=foo wire in the > toplevel and then putting an input or output with refdes=foo in the > subdesigns, so my +3.3V isn't continuous through my board as intended. > > The odd thing is that my ground isn't continuous either, and it didn't > look as if the gTAG is doing anything special about this?
I don't think the gTAG was ever made, so it is possible that there are bugs in it. If you attach an attribute "netname=3v3" or some such, to all your 3.3V lines on every page, it should all connect up. I don't think it is the netname=foo <=> refdes=foo which links up the hierarchy... , look at the "pinlabel" attribute of the symbol instantiated in the hierarchy. I've not got the details immediately to hand though, so could be wrong. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) _______________________________________________ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user