> Was the need for the 2$ part due to pins or due to resources? Resources. There weren't enough intermediate nodes to do all the logic equations, I ran out of "product terms". The minimal design in a '72 used about 60% of the resources, a little more than half (which would have fit in the '36). Once I realized that I needed the '72 anyway, I added some features to use up the remaining pins and resources - blanking, polarity, LZ, latch.
Here's the summary: Design Name: top Date: 2- 8-2008, 7:30PM Device Used: XC9572XL-10-VQ44 Fitting Status: Successful ************************* Mapped Resource Summary ************************** Macrocells Product Terms Function Block Registers Pins Used/Tot Used/Tot Inps Used/Tot Used/Tot Used/Tot 57 /72 ( 79%) 254 /360 ( 71%) 113/216 ( 52%) 8 /72 ( 11%) 34 /34 (100%) ** Function Block Resources ** Function Mcells FB Inps Pterms IO Block Used/Tot Used/Tot Used/Tot Used/Tot FB1 12/18 34/54 69/90 6/ 9 FB2 18/18* 26/54 43/90 9/ 9* FB3 15/18 20/54 72/90 0/ 9 FB4 12/18 33/54 70/90 6/ 7 ----- ----- ----- ----- 57/72 113/216 254/360 21/34 * - Resource is exhausted ** Global Control Resources ** Global clock net(s) unused. Global output enable net(s) unused. Global set/reset net(s) unused. ** Pin Resources ** Signal Type Required Mapped | Pin Type Used Total ------------------------------------|------------------------------------ Input : 13 13 | I/O : 28 28 Output : 21 21 | GCK/IO : 3 3 Bidirectional : 0 0 | GTS/IO : 2 2 GCK : 0 0 | GSR/IO : 1 1 GTS : 0 0 | GSR : 0 0 | ---- ---- Total 34 34 _______________________________________________ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user